Gallese; Maria-Luisa

Patent Applications and Registrations

Patent applications and USPTO patent grants for Gallese; Maria-Luisa.The latest application filed is for "memory devices for reading memory cells of different memory planes".

Company Profile

1.16.15

Gallese; Maria-Luisa - Avezzano IT
Gallese; Maria Luisa - Avezzamp IT
Gallese; Maria Luisa - Via Bultrini IT

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Methods and apparatus for providing redundancy in memory Grant 10,446,258 - Moschiano , et al. Oc	2019-10-15
Single node power management for multiple memory devices Grant 10,170,167 - Castelli , et al. J	2019-01-01
Memory devices for reading memory cells of different memory planes Grant 10,037,809 - Moschiano , et al. July 31, 2	2018-07-31
Memory Devices For Reading Memory Cells Of Different Memory Planes App 20180075913 - Moschiano; Violante ; et al.	2018-03-15
Methods And Apparatus For Providing Redundancy In Memory App 20180047460 - Moschiano; Violante ; et al.	2018-02-15
Memory devices for reading memory cells of different memory planes Grant 9,779,826 - Moschiano , et al. October 3, 2	2017-10-03
Methods for providing redundancy in a memory array comprising mapping portions of data associated with a defective address Grant 9,779,839 - Moschiano , et al. October 3, 2	2017-10-03
Concurrently reading first and second pages of memory cells having different page addresses Grant 9,754,674 - Moschiano , et al. September 5, 2	2017-09-05
Concurrently Reading First And Second Pages Of Memory Cells Having Different Page Addresses App 20170025181 - Moschiano; Violante ; et al.	2017-01-26
Memory controllers Grant 9,513,912 - De Santis , et al. December 6, 2	2016-12-06
Concurrently reading first and second pages of memory cells having different page addresses Grant 9,502,125 - Moschiano , et al. November 22, 2	2016-11-22
Single Node Power Management For Multiple Memory Devices App 20160267953 - Castelli; Mauro ; et al.	2016-09-15
Memory area protection system and methods Grant 9,406,388 - De Santis , et al. August 2, 2	2016-08-02
Single node power management for multiple memory devices Grant 9,349,423 - Castelli , et al. May 24, 2	2016-05-24
Concurrently Reading First And Second Pages Of Memory Cells Having Different Page Addresses App 20160071605 - Moschiano; Violante ; et al.	2016-03-10
Methods And Apparatus For Providing Redundancy In Memory App 20160071619 - Moschiano; Violante ; et al.	2016-03-10
Single Node Power Management For Multiple Memory Devices App 20160064052 - Castelli; Mauro ; et al.	2016-03-03
Data interleaving module Grant 9,189,440 - Pilolli , et al. November 17, 2	2015-11-17
Data Interleaving Module App 20150019787 - Pilolli; Luigi ; et al.	2015-01-15
Data interleaving module Grant 8,804,452 - Pilolli , et al. August 12, 2	2014-08-12
Data Interleaving Module App 20140040571 - Pilolli; Luigi ; et al.	2014-02-06
Memory Controllers App 20140032886 - Santis; Luca De ; et al.	2014-01-30
Memory Area Protection System and Methods App 20100138623 - De Santis; Luca ; et al.	2010-06-03
Internal Fail Bit Or Byte Counter App 20100031096 - Di Iorio; Ercole Rosario ; et al.	2010-02-04
Background block erase check for flash memories Grant 7,117,402 - Di Zenzo , et al. October 3, 2	2006-10-03
Background block erase check for flash memories App 20030101390 - Di Zenzo, Maurizio ; et al.	2003-05-29

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