Galbiati; Paola

Patent Applications and Registrations

Patent applications and USPTO patent grants for Galbiati; Paola.The latest application filed is for "semiconductor electronic device and method of manufacturing thereof".

Company Profile

0.11.3

Galbiati; Paola - Monza IT

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Semiconductor electronic device and method of manufacturing thereof Grant 7,126,230 - Andreini , et al. October 24, 2	2006-10-24
Semiconductor electronic device and method of manufacturing thereof App 20050035468 - Andreini, Antonio ; et al.	2005-02-17
RESURF LDMOS integrated structure App 20020011626 - Croce, Giuseppe ; et al.	2002-01-31
Low on-resistance LDMOS App 20010048133 - Croce, Giuseppe ; et al.	2001-12-06
Mixed technology integrated device comprising complementary LDMOS power transistors, CMOS and vertical PNP integrated structures having an enhanced ability to withstand a relatively high supply voltage Grant RE37,424 - Contiero , et al. October 30, 2	2001-10-30
Belowground and oversupply protection of junction isolated integrated circuits Grant 6,271,567 - Pozzoni , et al. August 7, 2	2001-08-07
Process for fabricating a high voltage MOSFET Grant 6,093,588 - De Petro , et al. July 25, 2	2000-07-25
Process for the manufacturing of integrated circuits comprising low-voltage and high-voltage DMOS-technology power devices and non-volatile memory cells Grant 6,022,778 - Contiero , et al. February 8, 2	2000-02-08
Method for fabricating a semiconductor diode with BCD technology Grant 5,940,700 - Galbiati , et al. August 17, 1	1999-08-17
VDMOS transistor with improved breakdown characteristics Grant 5,430,316 - Contiero , et al. July 4, 1	1995-07-04
Mixed technology integrated circuit comprising CMOS structures and efficient lateral bipolar transistors with a high early voltage and fabrication thereof Grant 5,081,517 - Contiero , et al. January 14, 1	1992-01-14
Mixed technology integrated device comprising complementary LDMOS power transistors, CMOS and vertical PNP integrated structures having an enhanced ability to withstand a relatively high supply voltage Grant 5,041,895 - Contiero , et al. August 20, 1	1991-08-20
Monolithically integrated semiconductor device containing bipolar junction transistors, CMOS and DMOS transistors and low leakage diodes and a method for its fabrication Grant 4,887,142 - Bertotti , et al. December 12, 1	1989-12-12
Self-aligned process for fabricating small DMOS cells Grant 4,774,198 - Contiero , et al. September 27, 1	1988-09-27

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