Gaidis; Michael C.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Gaidis; Michael C..The latest application filed is for "spin transfer torque cell for magnetic random access memory".

Company Profile

6.71.70

Gaidis; Michael C. - San Jose CA
Gaidis; Michael C. - Wappingers Falls NY
Gaidis; Michael C. - Yorktown Heights NY
- Wappingers Falls NY US
Gaidis; Michael C. - Wappinger Falls NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Spin transfer torque cell for magnetic random access memory Grant 10,424,727 - Gaidis , et al. Sept	2019-09-24
Spin Transfer Torque Cell For Magnetic Random Access Memory App 20190221738 - GAIDIS; MICHAEL C. ; et al.	2019-07-18
Spin transfer torque cell for magnetic random access memory Grant 10,326,074 - Gaidis , et al.	2019-06-18
Method Of Forming An On-pitch Self-aligned Hard Mask For Contact To A Tunnel Junction Using Ion Beam Etching App 20180240967 - Gaidis; Michael C. ; et al.	2018-08-23
Method of forming an on-pitch self-aligned hard mask for contact to a tunnel junction using ion beam etching Grant 10,003,014 - Gaidis , et al. June 19, 2	2018-06-19
Spin Transfer Torque Cell For Magnetic Random Access Memory App 20170338407 - GAIDIS; MICHAEL C. ; et al.	2017-11-23
Spin transfer torque cell for magnetic random access memory Grant 9,793,471 - Gaidis , et al. October 17, 2	2017-10-17
Linear MRAM device with a self-aligned bottom contact Grant 9,553,128 - Annunziata , et al. January 24, 2	2017-01-24
Linear MRAM device with a self-aligned bottom contact Grant 9,553,257 - Annunziata , et al. January 24, 2	2017-01-24
Linear Mram Device With A Self-aligned Bottom Contact App 20170005260 - Annunziata; Anthony J. ; et al.	2017-01-05
Linear Mram Device With A Self-aligned Bottom Contact App 20170005135 - Annunziata; Anthony J. ; et al.	2017-01-05
Injection pillar definition for line MRAM by a self-aligned sidewall transfer Grant 9,536,925 - Annunziata , et al. January 3, 2	2017-01-03
Injection Pillar Definition For Line Mram By A Self-aligned Sidewall Transfer App 20160380027 - Annunziata; Anthony J. ; et al.	2016-12-29
Method Of Forming An On-pitch Self-aligned Hard Mask For Contact To A Tunnel Junction Using Ion Beam Etching App 20160276579 - Gaidis; Michael C. ; et al.	2016-09-22
Spin Transfer Torque Cell For Magnetic Random Access Memory App 20160218281 - GAIDIS; MICHAEL C. ; et al.	2016-07-28
Spin transfer torque cell for magnetic random access memory Grant 9,318,698 - Gaidis , et al. April 19, 2	2016-04-19
Injection pillar definition for line MRAM by a self-aligned sidewall transfer Grant 9,299,924 - Annunziata , et al. March 29, 2	2016-03-29
Method Of Forming An On-pitch Self-aligned Hard Mask For Contact To A Tunnel Junction Using Ion Beam Etching App 20150372225 - Gaidis; Michael C. ; et al.	2015-12-24
Spin Transfer Torque Cell For Magnetic Random Access Memory App 20150236252 - GAIDIS; MICHAEL C. ; et al.	2015-08-20
Spin transfer torque cell for magnetic random access memory Grant 9,082,963 - Gaidis , et al. July 14, 2	2015-07-14
Thermally assisted MRAM with a multilayer encapsulant for low thermal conductivity Grant 9,070,868 - Annuziata , et al. June 30, 2	2015-06-30
Thermally assisted MRAM with a multilayer encapsulant for low thermal conductivity Grant 9,054,300 - Annunziata , et al. June 9, 2	2015-06-09
Method for fabricating synthetic antiferromagnetic (SAF) device Grant 9,015,927 - Abraham , et al. April 28, 2	2015-04-28
Spin Transfer Torque Cell For Magnetic Random Access Memory App 20150087080 - Gaidis; Michael C. ; et al.	2015-03-26
Magnetic domain wall shift register memory device readout Grant 8,951,811 - Gaidis , et al. February 10, 2	2015-02-10
Multiple bit nonvolatile memory based on current induced domain wall motion in a nanowire magnetic tunnel junction Grant 8,934,289 - Annunziata , et al. January 13, 2	2015-01-13
Spin transfer torque cell for magnetic random access memory Grant 8,928,100 - Gaidis , et al. January 6, 2	2015-01-06
Spin-torque based memory device with read and write current paths modulated with a non-linear shunt resistor Grant 8,927,301 - Gaidis , et al. January 6, 2	2015-01-06
Multiple bit nonvolatile memory based on current induced domain wall motion in a nanowire magnetic tunnel junction Grant 8,923,039 - Annunziata , et al. December 30, 2	2014-12-30
Multiple bit nonvolatile memory based on current induced domain wall motion in a nanowire magnetic tunnel junction Grant 08923039 -	2014-12-30
Thermally Assisted Mram With A Multilayer Encapsulant For Low Thermal Conductivity App 20140353782 - Annunziata; Anthony J. ; et al.	2014-12-04
Thermally Assisted Mram With A Multilayer Encapsulant For Low Thermal Conductivity App 20140356979 - Annunziata; Anthony J. ; et al.	2014-12-04
Pinning magnetic domain walls in a magnetic domain shift register memory device Grant 8,902,626 - Annunziata , et al. December 2, 2	2014-12-02
Pillar-based interconnects for magnetoresistive random access memory Grant 8,884,387 - Assefa , et al. November 11, 2	2014-11-11
Magnetic random access memory with synthetic antiferromagnetic storage layers and non-pinned reference layers Grant 8,852,677 - Abraham , et al. October 7, 2	2014-10-07
Magnetic random access memory with synthetic antiferromagnetic storage layers and non-pinned reference layers Grant 8,852,762 - Abraham , et al. October 7, 2	2014-10-07
Pillar-based interconnects for magnetoresistive random access memory Grant 8,796,041 - Assefa , et al. August 5, 2	2014-08-05
Pinning magnetic domain walls in a magnetic domain shift register memory device Grant 8,787,062 - Annunziata , et al. July 22, 2	2014-07-22
Magnetic domain wall shift register memory device readout Grant 8,772,889 - Gaidis , et al. July 8, 2	2014-07-08
Method and apparatus for controlled application of Oersted field to magnetic memory structure Grant 8,767,432 - Annunziata , et al. July 1, 2	2014-07-01
Method And Apparatus For Controlled Application Of Oersted Field To Magnetic Memory Structure App 20140160829 - Annunziata; Anthony J. ; et al.	2014-06-12
Magnetic tunnel junction self-alignment in magnetic domain wall shift register memory devices Grant 8,741,664 - Annunziata , et al. June 3, 2	2014-06-03
Magnetic Domain Wall Shift Register Memory Device Readout App 20140138610 - Gaidis; Michael C. ; et al.	2014-05-22
Magnetic Domain Wall Shift Register Memory Device Readout App 20140141530 - Gaidis; Michael C. ; et al.	2014-05-22
Multiple Bit Nonvolatile Memory Based On Current Induced Domain Wall Motion In A Nanowire Magnetic Tunnel Junction App 20140126281 - Annunziata; Anthony J. ; et al.	2014-05-08
Multiple Bit Nonvolatile Memory Based On Current Induced Domain Wall Motion In A Nanowire Magnetic Tunnel Junction App 20140126280 - Annunziata; Anthony J. ; et al.	2014-05-08
Magnetic Random Access Memory With Synthetic Antiferromagnetic Storage Layers And Non-pinned Reference Layers App 20140038309 - Abraham; David W. ; et al.	2014-02-06
Magnetic Random Access Memory With Synthetic Antiferromagnetic Storage Layers App 20140037991 - Abraham; David W. ; et al.	2014-02-06
Magnetic Random Access Memory With Synthetic Antiferromagnetic Storage Layers App 20140033516 - Abraham; David W. ; et al.	2014-02-06
Magnetic Random Access Memory With Synthetic Antiferromagnetic Storage Layers And Non-pinned Reference Layers App 20140037990 - Abraham; David W. ; et al.	2014-02-06
Pinning Magnetic Domain Walls In A Magnetic Domain Shift Register Memory Device App 20140003119 - Annunziata; Anthony J. ; et al.	2014-01-02
Pinning Magnetic Domain Walls In A Magnetic Domain Shift Register Memory Device App 20140003117 - Annunziata; Anthony J. ; et al.	2014-01-02
Magnetic Tunnel Junction Self-alignment In Magnetic Domain Wall Shift Register Memory Devices App 20140004625 - Annunziata; Anthony J. ; et al.	2014-01-02
Magnetic Tunnel Junction Self-alignment In Magnetic Domain Wall Shift Register Memory Devices App 20140003118 - Annunziata; Anthony J. ; et al.	2014-01-02
Template-registered diblock copolymer mask for MRAM device formation Grant 8,519,497 - Gaidis August 27, 2	2013-08-27
Spin Transfer Torque Cell For Magnetic Random Access Memory App 20120326250 - GAIDIS; MICHAEL C. ; et al.	2012-12-27
Sidewall coating for non-uniform spin momentum-transfer magnetic tunnel junction current flow Grant 8,338,869 - Gaidis December 25, 2	2012-12-25
Tunnel junction via Grant 8,324,734 - Gaidis December 4, 2	2012-12-04
Pillar-based Interconnects For Magnetoresistive Random Access Memory App 20120299136 - ASSEFA; Solomon ; et al.	2012-11-29
Spin-torque Based Memory Device With Read And Write Current Paths Modulated With A Non-linear Shunt Resistor App 20120288964 - Gaidis; Michael C. ; et al.	2012-11-15
Spin-torque based memory device with read and write current paths modulated with a non-linear shunt resistor Grant 8,270,208 - Gaidis , et al. September 18, 2	2012-09-18
Template-Registered DiBlock Copolymer Mask for MRAM Device Formation App 20120141748 - Gaidis; Michael C.	2012-06-07
Tunnel Junction Via App 20120133050 - Gaidis; Michael C.	2012-05-31
Template-registered diblock copolymer mask for MRAM device formation Grant 8,168,449 - Gaidis May 1, 2	2012-05-01
Magnetic devices and techniques for formation thereof Grant 8,164,128 - Kanakasabapathy , et al. April 24, 2	2012-04-24
Tunnel junction via Grant 8,124,426 - Gaidis February 28, 2	2012-02-28
High density planar magnetic domain wall memory apparatus Grant 8,023,305 - Gaidis , et al. September 20, 2	2011-09-20
High density planar magnetic domain wall memory apparatus Grant 8,009,453 - Gaidis , et al. August 30, 2	2011-08-30
Sidewall Coating For Non-uniform Spin Momentum-transfer Magnetic Tunnel Junction Current Flow App 20110204459 - GAIDIS; Michael C.	2011-08-25
Spin-torque Based Memory Device With Read And Write Current Paths Modulated With A Non-linear Shunt Resistor App 20110194341 - Gaidis; Michael C. ; et al.	2011-08-11
Sidewall coating for non-uniform spin momentum-transfer magnetic tunnel junction current flow Grant 7,989,224 - Gaidis August 2, 2	2011-08-02
Tunnel Junction Via App 20110163455 - Gaidis; Michael C.	2011-07-07
Template-Registered DiBlock Copolymer Mask for MRAM Device Formation App 20110104827 - Gaidis; Michael C.	2011-05-05
Pillar-based Interconnects For Magnetoresistive Random Access Memory App 20110049655 - Assefa; Solomon ; et al.	2011-03-03
Structure for stochastic integrated circuit personalization Grant 7,838,873 - Clevenger , et al. November 23, 2	2010-11-23
Sidewall Coating For Non-uniform Spin Momentum-transfer Magnetic Tunnel Junction Current Flow App 20100276768 - GAIDIS; MICHAEL C.	2010-11-04
Method for forming slot via bitline for MRAM devices Grant 7,825,420 - Gaidis , et al. November 2, 2	2010-11-02
Method of forming vertical contacts in integrated circuits Grant 7,803,639 - Assefa , et al. September 28, 2	2010-09-28
Method and apparatus for bitline and contact via integration in magnetic random access memory arrays Grant 7,772,663 - Kanakasabapathy , et al. August 10, 2	2010-08-10
Method and apparatus for fabricating sub-lithography data tracks for use in magnetic shift register memory devices Grant 7,755,921 - Assefa , et al. July 13, 2	2010-07-13
Method and structure for forming slot via bitline for MRAM devices Grant 7,635,884 - Gaidis , et al. December 22, 2	2009-12-22
Method For Forming Slot Via Bitline For Mram Devices App 20090302405 - Gaidis; Michael C. ; et al.	2009-12-10
Hard mask structure for patterning of materials Grant 7,550,044 - Gaidis , et al. June 23, 2	2009-06-23
Structure and method for stochastic integrated circuit personalization Grant 7,544,578 - Clevenger , et al. June 9, 2	2009-06-09
Utilizing sidewall spacer features to form magnetic tunnel junctions in an integrated circuit Grant 7,531,367 - Assefa , et al. May 12, 2	2009-05-12
Method of forming high density planar magnetic domain wall memory Grant 7,514,271 - Gaidis , et al. April 7, 2	2009-04-07
Method And Apparatus For Fabricating Sub-lithography Data Tracks For Use In Magnetic Shift Register Memory Devices App 20090046493 - ASSEFA; SOLOMON ; et al.	2009-02-19
Structure For Stochastic Integrated Circuit Personalization App 20080308801 - Clevenger; Lawrence A. ; et al.	2008-12-18
High Density Planar Magnetic Domain Wall Memory Apparatus And Method Of Forming The Same App 20080243972 - Gaidis; Michael C. ; et al.	2008-10-02
High Density Planar Magnetic Domain Wall Memory Apparatus App 20080239785 - Gaidis; Michael C. ; et al.	2008-10-02
High Density Planar Magnetic Domain Wall Memory Apparatus App 20080239784 - Gaidis; Michael C. ; et al.	2008-10-02
Utilizing Sidewall Spacer Features to Form Magnetic Tunnel Junctions in an Integrated Circuit App 20080211055 - Assefa; Solomon ; et al.	2008-09-04
Method And Apparatus For Bitline And Contact Via Integration In Magnetic Random Access Memory Arrays App 20080198647 - Kanakasabapathy; Sivananda ; et al.	2008-08-21
Hard Mask Structure for Patterning of Materials App 20080185101 - Gaidis; Michael C. ; et al.	2008-08-07
Magnetic devices and techniques for formation thereof Grant 7,399,646 - Kanakasabapathy , et al. July 15, 2	2008-07-15
Method of Forming Vertical Contacts in Integrated Circuits App 20080164617 - Assefa; Solomon ; et al.	2008-07-10
Structure And Method For Stochastic Integrated Circuit Personalization App 20080157314 - Clevenger; Lawrence A. ; et al.	2008-07-03
Hard mask structure for patterning of materials Grant 7,381,343 - Gaidis , et al. June 3, 2	2008-06-03
Magnetic Devices and Techniques For Formation Thereof App 20080043379 - Kanakasabapathy; Sivananda K. ; et al.	2008-02-21
Method and structure for generating offset fields for use in MRAM devices Grant 7,330,371 - Gaidis , et al. February 12, 2	2008-02-12
Ferromagnetic liner for conductive lines of magnetic memory cells Grant 7,259,025 - Leuschner , et al. August 21, 2	2007-08-21
Utilizing sidewall spacer features to form magnetic tunnel junctions in an integrated circuit App 20070166840 - Assefa; Solomon ; et al.	2007-07-19
Planar magnetic tunnel junction substrate having recessed alignment marks Grant 7,241,668 - Gaidis July 10, 2	2007-07-10
Ferromagnetic liner for conductive lines of magnetic memory cells App 20070105241 - Leuschner; Rainer ; et al.	2007-05-10
Method of patterning a magnetic tunnel junction stack for a magneto-resistive random access memory Grant 7,211,446 - Gaidis , et al. May 1, 2	2007-05-01
Magnetic devices and techniques for formation thereof App 20070048950 - Kanakasabapathy; Sivananda K. ; et al.	2007-03-01
Method and structure for forming slot via bitline for MRAM devices App 20070023806 - Gaidis; Michael C. ; et al.	2007-02-01
Hard mask structure for patterning of materials App 20070020934 - Gaidis; Michael C. ; et al.	2007-01-25
Method And Structure For Generating Offset Fields For Use In Mram Devices App 20070013016 - Gaidis; Michael C. ; et al.	2007-01-18
Method and structure for generating offset fields for use in MRAM devices Grant 7,133,309 - Gaidis , et al. November 7, 2	2006-11-07
Method And Structure For Generating Offset Fields For Use In Mram Devices App 20060154381 - Gaidis; Michael C. ; et al.	2006-07-13
Planar magnetic tunnel junction substrate having recessed alignment marks App 20060141737 - Gaidis; Michael C.	2006-06-29
Method for fabricating magnetic field concentrators as liners around conductive wires in microelectronic devices Grant 7,033,881 - Gaidis , et al. April 25, 2	2006-04-25
Ferromagnetic liner for conductive lines of magnetic memory cells App 20060022286 - Leuschner; Rainer ; et al.	2006-02-02
Structure And Method Of Patterning A Magnetic Tunnel Junction Stack For A Magneto-resistive Random Access Memory App 20050277206 - Gaidis, Michael C. ; et al.	2005-12-15
Method For Fabricating Magnetic Field Concentrators As Liners Around Conductive Wires In Microelectronic Devices App 20050274997 - Gaidis, Michael C. ; et al.	2005-12-15
Self-aligned mask to reduce cell layout area Grant 6,974,770 - Costrini , et al. December 13, 2	2005-12-13
Method for improved alignment of magnetic tunnel junction elements Grant 6,933,204 - Sarma , et al. August 23, 2	2005-08-23
Method For Improved Alignment Of Magnetic Tunnel Junction Elements App 20050079683 - Sarma, Chandrasekhar ; et al.	2005-04-14
Self-aligned mask to reduce cell layout area App 20040259358 - Costrini, Gregory ; et al.	2004-12-23
Recessed metal lines for protective enclosure in integrated circuits Grant 6,812,141 - Gaidis , et al. November 2, 2	2004-11-02
Maskless array protection process flow for forming interconnect vias in magnetic random access memory devices Grant 6,784,091 - Nuetzel , et al. August 31, 2	2004-08-31
BiLevel metallization for embedded back end of the line structures Grant 6,660,568 - Gaidis December 9, 2	2003-12-09