loadpatents
name:-0.0091698169708252
name:-0.044821977615356
name:-0.012218952178955
GAIDE; Brian C. Patent Filings

GAIDE; Brian C.

Patent Applications and Registrations

Patent applications and USPTO patent grants for GAIDE; Brian C..The latest application filed is for "clock tree routing in a chip stack".

Company Profile
10.52.10
  • GAIDE; Brian C. - Erie CO
  • Gaide; Brian C. - Eire CO
  • Gaide; Brian C. - Glassboro NJ US
  • Gaide; Brian C. - Longmont CO
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Clock Tree Routing In A Chip Stack
App 20220197329 - GAIDE; Brian C.
2022-06-23
Power delivery network for active-on-active stacked integrated circuits
Grant 11,270,977 - Jain , et al. March 8, 2
2022-03-08
Multi-chip stacked devices
Grant 11,239,203 - Gaide , et al. February 1, 2
2022-02-01
Compute Dataflow Architecture
App 20210336622 - YOUNG; Steven P. ;   et al.
2021-10-28
Adaptive integrated programmable device platform
Grant 11,063,594 - Ahmad , et al. July 13, 2
2021-07-13
Power Delivery Network For Active-on-active Stacked Integrated Circuits
App 20210143127 - JAIN; Praful ;   et al.
2021-05-13
Multi-chip Stacked Devices
App 20210134760 - GAIDE; Brian C. ;   et al.
2021-05-06
Programmable termination circuits for programmable devices
Grant 10,998,904 - Agarwal , et al. May 4, 2
2021-05-04
Global clock and a leaf clock divider
Grant 10,871,796 - Gaide , et al. December 22, 2
2020-12-22
Redundancy scheme for multi-chip stacked devices
Grant 10,825,772 - Young , et al. November 3, 2
2020-11-03
Redundancy Scheme For Multi-chip Stacked Devices
App 20200303311 - YOUNG; Steven P. ;   et al.
2020-09-24
Redundancy scheme for a 3D stacked device
Grant 10,741,524 - Gaide , et al. A
2020-08-11
Configurable logic block (CLB) internal routing architecture for enhanced local routing and clocking improvements
Grant 10,715,149 - Dellinger , et al.
2020-07-14
Adaptive integrated programmable device platform
Grant 10,673,439 - Ahmad , et al.
2020-06-02
Redundancy Scheme For A 3d Stacked Device
App 20190333892 - Gaide; Brian C. ;   et al.
2019-10-31
Programmable Pipeline Interface Circuit
App 20190181863 - Ganusov; Ilya K. ;   et al.
2019-06-13
Programmable pipeline interface circuit
Grant 10,320,386 - Ganusov , et al.
2019-06-11
Selectively providing clock signals using a programmable control circuit
Grant 10,284,185 - Gaide , et al.
2019-05-07
Distributed voltage and temperature compensation for clock deskewing
Grant 10,110,202 - Gaide , et al. October 23, 2
2018-10-23
Using an integrated circuit die for multiple devices
Grant 10,043,724 - Gaide , et al. August 7, 2
2018-08-07
Distributed multi-die routing in a multi-chip module
Grant 9,859,896 - Gaide , et al. January 2, 2
2018-01-02
Lut cascading circuit
Grant 9,602,108 - Gaide , et al. March 21, 2
2017-03-21
Circuits for and methods of generating clock signals enabling the latching of data in an integrated circuit
Grant 9,559,669 - Gaide January 31, 2
2017-01-31
Interconnect multiplexers and methods of reducing contention currents in an interconnect multiplexer
Grant 9,509,307 - Santurkar , et al. November 29, 2
2016-11-29
Programmable power reduction technique using transistor threshold drops
Grant 9,496,871 - Devlin , et al. November 15, 2
2016-11-15
Cascaded LUT carry logic circuit
Grant 9,455,714 - Gaide September 27, 2
2016-09-27
Circuits for and methods of controlling power within an integrated circuit
Grant 9,438,244 - Sood , et al. September 6, 2
2016-09-06
Signed multiplier circuit utilizing a uniform array of logic blocks
Grant 9,411,554 - Young , et al. August 9, 2
2016-08-09
Circuits For And Methods Of Controlling Power Within An Integrated Circuit
App 20160118988 - Sood; Santosh Kumar ;   et al.
2016-04-28
Adaptive low skew clocking architecture
Grant 9,143,122 - Gaide September 22, 2
2015-09-22
Register circuits and methods of storing data in a register circuit
Grant 9,007,110 - Gaide April 14, 2
2015-04-14
Circuits for shifting bussed data
Grant 9,002,915 - Young , et al. April 7, 2
2015-04-07
Clock network architecture
Grant 8,937,491 - Gaide , et al. January 20, 2
2015-01-20
Method and apparatus for programmable device testing in stacked die applications
Grant 8,933,447 - Rahman , et al. January 13, 2
2015-01-13
Circuits for and methods of asychronously transmitting data in an integrated circuit
Grant 8,928,386 - Ganusov , et al. January 6, 2
2015-01-06
Methods of pipelining a data path in an integrated circuit
Grant 8,893,071 - Gaide November 18, 2
2014-11-18
Flip-flop array with option to ignore control signals
Grant 8,866,509 - Fu , et al. October 21, 2
2014-10-21
Self-timed single track circuit
Grant 8,773,166 - Gaide , et al. July 8, 2
2014-07-08
Programmable interconnect network
Grant 8,773,164 - Gaide , et al. July 8, 2
2014-07-08
Clock Network Architecture
App 20140132305 - Gaide; Brian C. ;   et al.
2014-05-15
Configuration of a multi-die integrated circuit
Grant 8,536,895 - Lu , et al. September 17, 2
2013-09-17
Multiplier architecture utilizing a uniform array of logic blocks, and methods of using the same
Grant 8,527,572 - Young , et al. September 3, 2
2013-09-03
Configuration Of A Multi-die Integrated Circuit
App 20120019292 - Lu; Weiguang ;   et al.
2012-01-26
Configuration of a multi-die integrated circuit
Grant 8,058,897 - Lu , et al. November 15, 2
2011-11-15
Circuits for replicating self-timed logic
Grant 7,948,265 - Young , et al. May 24, 2
2011-05-24
Dynamically controlled output multiplexer circuits in a programmable integrated circuit
Grant 7,746,104 - Gaide , et al. June 29, 2
2010-06-29
Gating logic circuits in a self-timed integrated circuit
Grant 7,746,111 - Gaide , et al. June 29, 2
2010-06-29
Output structure with cascaded control signals for logic blocks in integrated circuits, and methods of using the same
Grant 7,746,112 - Gaide , et al. June 29, 2
2010-06-29
Multi-mode circuit in a self-timed integrated circuit
Grant 7,746,103 - Gaide , et al. June 29, 2
2010-06-29
Circuits for enabling feedback paths in a self-timed integrated circuit
Grant 7,746,106 - Gaide , et al. June 29, 2
2010-06-29
Circuits for fanning out data in a programmable self-timed integrated circuit
Grant 7,746,110 - Gaide , et al. June 29, 2
2010-06-29
Circuits for sharing self-timed logic
Grant 7,746,109 - Young , et al. June 29, 2
2010-06-29
Merging data streams in a self-timed programmable integrated circuit
Grant 7,746,105 - Gaide , et al. June 29, 2
2010-06-29
Compute-centric architecture for integrated circuits
Grant 7,746,108 - Young , et al. June 29, 2
2010-06-29
Bus-based logic blocks for self-timed integrated circuits
Grant 7,746,102 - Young , et al. June 29, 2
2010-06-29
Implementing conditional statements in self-timed logic circuits
Grant 7,733,123 - Young , et al. June 8, 2
2010-06-08
Selection circuit with programmable constant output
Grant 7,683,664 - Gaide March 23, 2
2010-03-23

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