Gabriel; Calvin T.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Gabriel; Calvin T..The latest application filed is for "line-edge roughness improvement for small pitches".

Company Profile

0.46.7

Gabriel; Calvin T. - Cupertino CA
GABRIEL; Calvin T - Cupertino CA
Gabriel; Calvin T. - Pacifica CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Line-edge roughness improvement for small pitches Grant 9,368,393 - Gabriel June 14, 2	2016-06-14
Line-edge Roughness Improvement For Small Pitches App 20150050814 - GABRIEL; Calvin T	2015-02-19
Line-edge roughness improvement for small pitches Grant 8,877,641 - Gabriel November 4, 2	2014-11-04
Line-edge Roughness Improvement For Small Pitches App 20110159699 - GABRIEL; Calvin T.	2011-06-30
Methods for designing grating structures for use in situ scatterometry to detect photoresist defects Grant 7,427,457 - Plat , et al. September 23, 2	2008-09-23
Quantifying and predicting the impact of line edge roughness on device reliability and performance Grant 7,379,924 - Marathe , et al. May 27, 2	2008-05-27
Silicon-containing resist to pattern organic low k-dielectrics Grant 7,309,659 - Subramanian , et al. December 18, 2	2007-12-18
Metal/oxide etch after polish to prevent bridging between adjacent features of a semiconductor structure Grant 7,288,487 - Kang , et al. October 30, 2	2007-10-30
Method to improve ignition in plasma etching or plasma deposition steps Grant 7,279,429 - Gabriel , et al. October 9, 2	2007-10-09
Using scatterometry to verify contact hole opening during tapered bilayer etch Grant 7,235,414 - Subramanian , et al. June 26, 2	2007-06-26
Method of making a semiconductor structure Grant 7,135,396 - Gabriel , et al. November 14, 2	2006-11-14
Method of forming an interlevel dielectric layer employing dielectric etch-back process without extra mask set Grant 7,132,306 - Rhee , et al. November 7, 2	2006-11-07
System and method using in situ scatterometry to detect photoresist pattern integrity during the photolithography process Grant 7,052,921 - Plat , et al. May 30, 2	2006-05-30
Contact etch resistant spacers App 20050121738 - Gabriel, Calvin T. ; et al.	2005-06-09
Method for reducing critical dimension attainable via the use of an organic conforming layer Grant 6,864,184 - Gabriel March 8, 2	2005-03-08
N-containing plasma etch process with reduced resist poisoning Grant 6,846,749 - Gabriel , et al. January 25, 2	2005-01-25
Process for improving the etch stability of ultra-thin photoresist Grant 6,815,359 - Gabriel , et al. November 9, 2	2004-11-09
Line edge roughness reduction by plasma treatment before etch Grant 6,811,956 - Gabriel November 2, 2	2004-11-02
Selective photoresist hardening to facilitate lateral trimming Grant 6,716,571 - Gabriel , et al. April 6, 2	2004-04-06
Attenuated phase shift mask for use in EUV lithography and a method of making such a mask Grant 6,645,679 - La Fontaine , et al. November 11, 2	2003-11-11
Method for forming an interconnect structure using a CVD organic BARC to mitigate via poisoning Grant 6,632,707 - Wang , et al. October 14, 2	2003-10-14
Plasma etching using combination of CHF3 and CH3F Grant 6,610,608 - Okada , et al. August 26, 2	2003-08-26
Slot via filled dual damascene interconnect structure without middle etch stop layer Grant 6,603,206 - Wang , et al. August 5, 2	2003-08-05
Plasma etch process for nonhomogenous film Grant 6,599,839 - Gabriel , et al. July 29, 2	2003-07-29
Post-treatment of low-k dielectric for prevention of photoresist poisoning Grant 6,583,046 - Okada , et al. June 24, 2	2003-06-24
Pre-treatment of low-k dielectric for prevention of photoresist poisoning Grant 6,534,397 - Okada , et al. March 18, 2	2003-03-18
Semiconductor device with variable composition low-k inter-layer dielectric and method of making Grant 6,518,646 - Hopper , et al. February 11, 2	2003-02-11
Use of hydrogen doping for protection of low-k dielectric layers Grant 6,495,447 - Okada , et al. December 17, 2	2002-12-17
Method of manufacturing a semiconductor structure with treatment to sacrificial stop layer producing diffusion to an adjacent low-k dielectric layer lowering the constant Grant 6,475,929 - Gabriel , et al. November 5, 2	2002-11-05
Dielectric layer with treated top surface forming an etch stop layer and method of making the same Grant 6,472,231 - Gabriel , et al. October 29, 2	2002-10-29
Silicon carbide barc in dual damascene processing Grant 6,465,889 - Subramanian , et al. October 15, 2	2002-10-15
Process for improving the etch stability of ultra-thin photoresist App 20020142607 - Gabriel, Calvin T. ; et al.	2002-10-03
Selective photoresist hardening to facilitate lateral trimming App 20020139773 - Gabriel, Calvin T. ; et al.	2002-10-03
Carrier gas modification for preservation of mask layer during plasma etching Grant 6,451,673 - Okada , et al. September 17, 2	2002-09-17
Slot via filled dual damascene structure without middle stop layer and method for making the same App 20020106889 - Wang, Fei ; et al.	2002-08-08
Method Of Fabricating A Slot Dual Damascene Structure Without Middle Stop Layer App 20020106885 - Wang, Fei ; et al.	2002-08-08
Method of making a slot via filled dual damascene structure with middle stop layer Grant 6,391,766 - Wang , et al. May 21, 2	2002-05-21
Method of making a dual damascene structure without middle stop layer Grant 6,383,919 - Wang , et al. May 7, 2	2002-05-07
Method for making a slot via filled dual damascene low k interconnect structure without middle stop layer Grant 6,372,635 - Wang , et al. April 16, 2	2002-04-16
Intelligent gate-level fill methods for reducing global pattern density effects Grant 6,323,113 - Gabriel , et al. November 27, 2	2001-11-27
Method for reducing faceting on a photoresist layer during an etch process Grant 6,103,457 - Gabriel August 15, 2	2000-08-15
Use of dummy underlayers for improvement in removal rate consistency during chemical mechanical polishing Grant 5,965,941 - Weling , et al. October 12, 1	1999-10-12
Optimized structures for dummy fill mask design Grant 5,861,342 - Gabriel , et al. January 19, 1	1999-01-19
Method for making shallow trench isolation structure having rounded corners Grant 5,753,561 - Lee , et al. May 19, 1	1998-05-19
Dummy underlayers for improvement in removal rate consistency during chemical mechanical polishing Grant 5,639,697 - Weling , et al. June 17, 1	1997-06-17
Method of inspecting planarity of wafer surface after etchback step in integrated circuit fabrication Grant 5,420,796 - Weling , et al. May 30, 1	1995-05-30
System and method for plasma etching endpoint detection Grant 5,405,488 - Dimitrelis , et al. April 11, 1	1995-04-11
Method and apparatus for patterning a metal layer Grant 5,397,433 - Gabriel March 14, 1	1995-03-14
Method for making anti-fuse structures Grant 5,290,734 - Boardman , et al. * March 1, 1	1994-03-01
Method and apparatus for detecting imminent end-point when etching dielectric layers in a plasma etch system Grant 5,198,072 - Gabriel March 30, 1	1993-03-30
Anti-fuse structures and methods for making same Grant 5,120,679 - Boardman , et al. June 9, 1	1992-06-09
Endpoint detection system and method for plasma etching Grant 4,954,212 - Gabriel , et al. September 4, 1	1990-09-04

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