Fuse; Tsuneaki
Patent Applications and Registrations
Patent applications and USPTO patent grants for Fuse; Tsuneaki.The latest application filed is for "semiconductor memory device".
- Fuse; Tsuneaki - Setagaya-ku JP
- Fuse; Tsuneaki - Tokyo JP
- FUSE, TSUNEAKI - TOKYO-TO JP
| Patent | Date |
|---|---|
| Semiconductor Memory Device App 20120243325 - Fuse; Tsuneaki | 2012-09-27 |
| Reference current generating circuit Grant 8,148,970 - Fuse , et al. April 3, 2 | 2012-04-03 |
| Sense-amplifier control circuit and controlling method of sense amplifier Grant 8,067,963 - Imai , et al. November 29, 2 | 2011-11-29 |
| Reference Current Generating Circuit App 20110050196 - Fuse; Tsuneaki ; et al. | 2011-03-03 |
| Sense-amplifier Control Circuit And Controlling Method Of Sense Amplifier App 20100090725 - IMAI; Seiro ; et al. | 2010-04-15 |
| Semiconductor device Grant 7,208,779 - Ohta , et al. April 24, 2 | 2007-04-24 |
| Semiconductor integrated circuit including CMOS logic gate Grant 6,979,870 - Fuse December 27, 2 | 2005-12-27 |
| Semiconductor device App 20050230751 - Ohta, Masako ; et al. | 2005-10-20 |
| Semiconductor integrated circuit App 20040203196 - Fuse, Tsuneaki | 2004-10-14 |
| Semiconductor integrated circuit Grant 6,677,797 - Kameyama , et al. January 13, 2 | 2004-01-13 |
| Level converter circuit Grant 6,466,054 - Kameyama , et al. October 15, 2 | 2002-10-15 |
| Semiconductor integrated circuit App 20020080663 - Kameyama, Atsushi ; et al. | 2002-06-27 |
| Apparatus comprising clock control circuit and device using internal clock signal synchronized to external clock signal Grant 6,393,080 - Kamoshida , et al. May 21, 2 | 2002-05-21 |
| Semiconductor integrated circuit Grant 6,392,467 - Oowaki , et al. May 21, 2 | 2002-05-21 |
| Clock control circuit Grant 6,388,484 - Kamoshida , et al. May 14, 2 | 2002-05-14 |
| Lateral Bipolar Transistor Formed On An Insulating Layer App 20010054746 - YAMADA, TAKASHI ; et al. | 2001-12-27 |
| Semiconductor integrated circuit App 20010052623 - Kameyama, Atsushi ; et al. | 2001-12-20 |
| Level converter circuit App 20010024130 - Kameyama, Atsushi ; et al. | 2001-09-27 |
| Semiconductor integrated circuit device Grant 6,177,811 - Fuse , et al. January 23, 2 | 2001-01-23 |
| Semiconductor integrated circuit having suppressed leakage currents Grant 6,087,893 - Oowaki , et al. July 11, 2 | 2000-07-11 |
| Integrated circuit with stacked sub-circuits between Vcc and ground so as to conserve power and reduce the voltage across any one transistor Grant 5,867,040 - Fuse , et al. February 2, 1 | 1999-02-02 |
| Dynamic semiconductor memory device having high integration density Grant 5,363,325 - Sunouchi , et al. November 8, 1 | 1994-11-08 |
| BiCMOS circuitry having a combination CMOS gate and a bipolar transistor Grant 5,077,492 - Fuse , et al. December 31, 1 | 1991-12-31 |
| Semiconductor memory using dynamic ram cells Grant 4,943,944 - Sakui , et al. July 24, 1 | 1990-07-24 |
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