loadpatents
name:-0.024895906448364
name:-0.030051946640015
name:-0.00054001808166504
Furuyama; Takaaki Patent Filings

Furuyama; Takaaki

Patent Applications and Registrations

Patent applications and USPTO patent grants for Furuyama; Takaaki.The latest application filed is for "time reduction of address setup/hold time for semiconductor memory".

Company Profile
0.26.23
  • Furuyama; Takaaki - Tokyo JP
  • Furuyama; Takaaki - Kani JP
  • Furuyama; Takaaki - Gifu JP
  • Furuyama; Takaaki - Aichi-ken JP
  • Furuyama; Takaaki - Gifu-ken JP
  • FURUYAMA; Takaaki - Kani-Shi JP
  • Furuyama; Takaaki - Kasugai JP
  • Furuyama; Takaaki - Kasugai-shi JP
  • Furuyama; Takaaki - Aichi JP
  • Furuyama, Takaaki - Aizuwakamatsu JP
  • Furuyama; Takaaki - Kasugi JP
  • Furuyama; Takaaki - Kawasaki JP
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Non-volatile semiconductor memory
Grant 8,279,673 - Furuyama October 2, 2
2012-10-02
Nonvolatile memory device having a plurality of memory blocks
Grant 8,094,478 - Furuyama , et al. January 10, 2
2012-01-10
Time reduction of address setup/hold time for semiconductor memory
Grant 8,031,537 - Niimi , et al. October 4, 2
2011-10-04
Method and apparatus for address allotting and verification in a semiconductor device
Grant 8,023,341 - Kawabata , et al. September 20, 2
2011-09-20
Time Reduction Of Address Setup/hold Time For Semiconductor Memory
App 20110103157 - NIIMI; Makoto ;   et al.
2011-05-05
Time reduction of address setup/hold time for semiconductor memory
Grant 7,889,573 - Niimi , et al. February 15, 2
2011-02-15
Method And Apparatus For Address Allotting And Verification In A Semiconductor Device
App 20110026287 - KAWABATA; Shozo ;   et al.
2011-02-03
Nonvolatile Memory Device Having A Plurality Of Memory Blocks
App 20110002177 - FURUYAMA; Takaaki ;   et al.
2011-01-06
Method and apparatus for address allotting and verification in a semiconductor device
Grant 7,813,154 - Kawabata , et al. October 12, 2
2010-10-12
Nonvolatile memory device having a plurality of memory blocks
Grant 7,808,808 - Furuyama , et al. October 5, 2
2010-10-05
Non-volatile Semiconductor Memory
App 20100157677 - FURUYAMA; Takaaki
2010-06-24
Time Reduction Of Address Setup/hold Time For Semiconductor Memory
App 20090323435 - Niimi; Makoto ;   et al.
2009-12-31
Nonvolatile Memory Device Having A Plurality Of Memory Blocks
App 20090034334 - FURUYAMA; Takaaki ;   et al.
2009-02-05
Method And Apparatus For Address Allotting And Verification In A Semiconductor Device
App 20080316787 - KAWABATA; Shozo ;   et al.
2008-12-25
Method for fabricating a semiconductor device
Grant 7,452,771 - Ito , et al. November 18, 2
2008-11-18
Method and apparatus for address allotting and verification in a semiconductor device
Grant 7,433,219 - Kawabata , et al. October 7, 2
2008-10-07
Method and apparatus for initialization control in a non-volatile memory device
Grant 7,415,568 - Kawabata , et al. August 19, 2
2008-08-19
Memory device and control method therefor
Grant 7,321,515 - Shimbayashi , et al. January 22, 2
2008-01-22
Memory system and test method therefor
Grant 7,281,180 - Furuyama , et al. October 9, 2
2007-10-09
Method and apparatus for applying bias to a storage device
Grant 7,239,548 - Kato , et al. July 3, 2
2007-07-03
Non-volatile memory and write method of the same
Grant 7,212,443 - Furuyama May 1, 2
2007-05-01
Method and apparatus for applying bias to a storage device
App 20060227630 - Kato; Kenta ;   et al.
2006-10-12
Memory device and control method therefor
App 20060227629 - Shimbayashi; Koji ;   et al.
2006-10-12
Method and apparatus for address allotting and verification in a semiconductor device
App 20060209583 - Kawabata; Shozo ;   et al.
2006-09-21
Semiconductor memory storage device and a redundancy control method therefor
Grant 7,068,555 - Sugimoto , et al. June 27, 2
2006-06-27
Semiconductor memory storage device and its redundant method
Grant 7,061,816 - Sugiura , et al. June 13, 2
2006-06-13
Method for fabricating a semiconductor device
App 20060046373 - Ito; Masaki ;   et al.
2006-03-02
Method and apparatus for initialization control in a non-volatile memory device
App 20060023500 - Kawabata; Shozo ;   et al.
2006-02-02
Memory system and test method therefor
App 20060002196 - Furuyama; Takaaki ;   et al.
2006-01-05
Semiconductor device comprising transistors having control gates and floating gate electrodes
Grant 6,977,411 - Ito , et al. December 20, 2
2005-12-20
Semiconductor memory storage device and its redundant method
App 20050185483 - Sugiura, Akira ;   et al.
2005-08-25
Semiconductor memory storage device and a redundancy control method therefor
App 20050185482 - Sugimoto, Satoru ;   et al.
2005-08-25
Nonvolatile semiconductor memory device
Grant 6,917,541 - Shimbayashi , et al. July 12, 2
2005-07-12
Semiconductor device and method for testing the same
App 20050149792 - Furuyama, Takaaki
2005-07-07
Non-volatile memory and write method of the same
App 20050141277 - Furuyama, Takaaki
2005-06-30
Threshold voltage adjustment method of non-volatile semiconductor memory device and non-volatile semiconductor memory device
Grant 6,879,521 - Furuyama April 12, 2
2005-04-12
Semiconductor device and method for fabricating the same
App 20040129970 - Ito, Masaki ;   et al.
2004-07-08
Threshold voltage adjustment method of non-volatile semiconductor memory device and non-volatile semiconductor memory device
App 20040008567 - Furuyama, Takaaki
2004-01-15
Flash memory capable of changing bank configuration
Grant 6,643,758 - Furuyama , et al. November 4, 2
2003-11-04
Nonvolatile semiconductor memory device
App 20030043623 - Shimbayashi, Koji ;   et al.
2003-03-06
Flash memory capable of changing bank configuration
App 20020161962 - Furuyama, Takaaki ;   et al.
2002-10-31
Semiconductor memory device and refreshing method of semiconductor memory device
App 20010043499 - Komura, Kazufumi ;   et al.
2001-11-22
Data writing method for semiconductor memory device
Grant 6,310,825 - Furuyama October 30, 2
2001-10-30
Circuit for resetting a pair of data buses of a semiconductor memory device
App 20010001261 - Sugamoto, Hiroyuki ;   et al.
2001-05-17
DRAM with reduced electric power consumption
Grant 6,097,658 - Satoh , et al. August 1, 2
2000-08-01
DRAM with reduced electric power consumption
Grant 5,867,438 - Nomura , et al. February 2, 1
1999-02-02
Semiconductor memory device provided with block write function
Grant 5,787,046 - Furuyama , et al. July 28, 1
1998-07-28
DRAM with reduced electric power consumption
Grant 5,594,699 - Nomura , et al. January 14, 1
1997-01-14
Dynamic random access memory having dummy word line for facilitating reset of row address latch
Grant 4,989,182 - Mochizuki , et al. January 29, 1
1991-01-29

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