FURUKAWA; Toshiharu

Patent Applications and Registrations

Patent applications and USPTO patent grants for FURUKAWA; Toshiharu.The latest application filed is for "sleep determining device, sleep determining method, and sleep determining program".

Company Profile

2.200.200

FURUKAWA; Toshiharu - Tokyo JP
Furukawa; Toshiharu - Essex Junction VT
Furukawa; Toshiharu - Essex Juction VT US
Furukawa; Toshiharu - Shinanomachi JP

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Sleep Determining Device, Sleep Determining Method, And Sleep Determining Program App 20210137452 - MITSUKURA; Yasue ; et al.	2021-05-13
Method of cleaving a single crystal substrate parallel to its active planar surface and method of using the cleaved daughter substrate Grant 10,589,445 - Furukawa , et al.	2020-03-17
Extremely thin semiconductor-on-insulator (ETSOI) layer Grant 9,263,517 - Abadeer , et al. February 16, 2	2016-02-16
Semiconductor-on-insulator (SOI) structure with selectivity placed sub-insulator layer void(s) and method of forming the SOI structure Grant 9,059,203 - Furukawa , et al. June 16, 2	2015-06-16
Creating extremely thin semiconductor-on-insulator (ETSOI) having substantially uniform thickness Grant 9,018,024 - Berliner , et al. April 28, 2	2015-04-28
Method of creating an extremely thin semiconductor-on-insulator (ETSOI) layer having a uniform thickness Grant 8,940,554 - Berliner , et al. January 27, 2	2015-01-27
Carbon nanotube structures for enhancement of thermal dissipation from semiconductor modules Grant 8,933,559 - Basker , et al. January 13, 2	2015-01-13
Selective deposition of germanium spacers on nitride Grant 8,900,961 - Chakravarti , et al. December 2, 2	2014-12-02
Microelectronic structure by selective deposition Grant 8,697,561 - Furukawa , et al. April 15, 2	2014-04-15
Anti-fuse device structure and electroplating circuit structure and method Grant 8,674,476 - Basker , et al. March 18, 2	2014-03-18
Semiconductor-on-insulator (soi) Structure With Selectively Placed Sub-insulator Layer Void(s) And Method Of Forming The Soi Structure App 20140021548 - Furukawa; Toshiharu ; et al.	2014-01-23
Semiconductor-on-insulator (SOI) structure with selectively placed sub-insulator layer void(s) and method of forming the SOI structure Grant 8,610,211 - Furukawa , et al. December 17, 2	2013-12-17
CMOS gate structures fabricated by selective oxidation Grant 8,568,604 - Doris , et al. October 29, 2	2013-10-29
Semiconductor-on-insulator (SOI) structures including gradient nitrided buried oxide (BOX) Grant 8,546,920 - Chou , et al. October 1, 2	2013-10-01
Field effect transistor Grant 8,541,823 - Furukawa , et al. September 24, 2	2013-09-24
Method of forming a planar field effect transistor with embedded and faceted source/drain stressors on a silicon-on-insulator (SOI) wafer, a planar field effect transistor structure and a design structure for the planar field effect transistor Grant 8,525,186 - Cheng , et al. September 3, 2	2013-09-03
Extremely Thin Semiconductor-on-insulator (etsoi) Layer App 20130200486 - Chatty; Kiran V. ; et al.	2013-08-08
Methods For Forming Field Effect Transistor Devices With Protective Spacers App 20130168775 - Basker; Veeraraghavan S. ; et al.	2013-07-04
Method for fabricating strained silicon-on-insulator structures and strained silicon-on insulator structures formed thereby Grant 8,450,806 - Furukawa , et al. May 28, 2	2013-05-28
High Performance Low Power Bulk Fet Device And Method Of Manufacture App 20130113051 - Cai; Jin ; et al.	2013-05-09
Integrated circuit with finFETs and MIM fin capacitor Grant 8,420,476 - Booth, Jr. , et al. April 16, 2	2013-04-16
Semiconductor-on-insulator (soi) Structures Including Gradient Nitrided Buried Oxide (box) App 20130037885 - Chou; Anthony I. ; et al.	2013-02-14
High performance low power bulk FET device and method of manufacture Grant 8,361,872 - Cai , et al. January 29, 2	2013-01-29
Carbon nanotube structures for enhancement of thermal dissipation from semiconductor modules Grant 8,299,605 - Basker , et al. October 30, 2	2012-10-30
Structure and method for improving storage latch susceptibility to single event upsets Grant 8,300,452 - Cannon , et al. October 30, 2	2012-10-30
Anti-fuse Device Structure And Electroplating Circuit Structure And Method App 20120261795 - Basker; Veeraraghavan S. ; et al.	2012-10-18
Semiconductor-on-insulator (SOI) structures including gradient nitrided buried oxide (BOX) Grant 8,288,826 - Chou , et al. October 16, 2	2012-10-16
Device component forming method with a trim step prior to sidewall image transfer (SIT) processing App 20120208356 - Furukawa; Toshiharu ; et al.	2012-08-16
Anti-fuse device structure and electroplating circuit structure and method Grant 8,242,578 - Basker , et al. August 14, 2	2012-08-14
Methods for Forming Field Effect Transistor Devices With Protective Spacers App 20120181613 - Basker; Veeraraghavan S. ; et al.	2012-07-19
Carbon Nanotube Structures For Enhancement Of Thermal Dissipation From Semiconductor Modules App 20120168931 - Basker; Veeraraghavan S. ; et al.	2012-07-05
Microelectronic Structure By Selective Deposition App 20120142182 - Furukawa; Toshiharu ; et al.	2012-06-07
Method Of Creating An Extremely Thin Semiconductor-on-insulator (etsoi) Layer Having A Uniform Thickness App 20120125538 - BERLINER; Nathaniel C. ; et al.	2012-05-24
Device component forming method with a trim step prior to sidewall image transfer (SIT) processing Grant 8,183,159 - Furukawa , et al. May 22, 2	2012-05-22
Forming An Extremely Thin Semiconductor-on-insulator (etsoi) Layer App 20120098087 - Abadeer; Wagdi W. ; et al.	2012-04-26
Microelectronic structure by selective deposition Grant 8,138,100 - Furukawa , et al. March 20, 2	2012-03-20
High Performance Low Power Bulk Fet Device And Method Of Manufacture App 20120056275 - CAI; Jin ; et al.	2012-03-08
Semiconductor-on-insulator (soi) Structures Including Gradient Nitrided Buried Oxide (box) App 20120049317 - Chou; Anthony I. ; et al.	2012-03-01
Method of creating an extremely thin semiconductor-on-insulator (ETSOI) layer having a uniform thickness Grant 8,124,427 - Berliner , et al. February 28, 2	2012-02-28
Forming an extremely thin semiconductor-on-insulator (ETSOI) layer Grant 8,110,483 - Abadeer , et al. February 7, 2	2012-02-07
Method for double pattern density Grant 8,105,901 - Cheng , et al. January 31, 2	2012-01-31
Semiconductor-on-insulator (soi) Structure With Selectively Placed Sub-insulator Layer Void(s) And Method Of Forming The Soi Structure App 20120018806 - Furukawa; Toshiharu ; et al.	2012-01-26
Integrated Circuit With Finfets And Mim Fin Capacitor App 20110291166 - Booth, JR.; Roger A. ; et al.	2011-12-01
Semiconductor-on-insulator(SOI) structures including gradient nitrided buried oxide (BOX) Grant 8,053,373 - Chou , et al. November 8, 2	2011-11-08
Field Effect Transistor App 20110266621 - Furukawa; Toshiharu ; et al.	2011-11-03
Method for monitoring patterning integrity of etched openings and forming conductive structures with the openings Grant 8,043,966 - Basker , et al. October 25, 2	2011-10-25
Shared gate for conventional planar device and horizontal CNT Grant 8,039,334 - Furukawa , et al. October 18, 2	2011-10-18
Immersion optical lithography system having protective optical coating Grant 8,009,268 - Holmes , et al. August 30, 2	2011-08-30
Band gap modulated optical sensor Grant 8,008,696 - Cheng , et al. August 30, 2	2011-08-30
Method Of Forming A Planar Field Effect Transistor With Embedded And Faceted Source/drain Stressors On A Silicon-on-insulator (soi) Wafer, A Planar Field Effect Transistor Structure And A Design Structure For The Planar Field Effect Transistor App 20110204384 - Cheng; Kangguo ; et al.	2011-08-25
Field effect transistor Grant 8,004,024 - Furukawa , et al. August 23, 2	2011-08-23
Metal-oxide-semiconductor device structures with tailored dopant depth profiles Grant 7,994,575 - Furukawa , et al. August 9, 2	2011-08-09
Method of making integrated circuit chip utilizing oriented carbon nanotube conductive layers Grant 7,989,222 - Furukawa , et al. August 2, 2	2011-08-02
Semispherical integrated circuit structures Grant 7,986,022 - Cheng , et al. July 26, 2	2011-07-26
Semiconductor transistors with contact holes close to gates Grant 7,985,643 - Furukawa , et al. July 26, 2	2011-07-26
Anti-fuse Device Structure And Electroplating Circuit Structure And Method App 20110169129 - Basker; Veeraraghavan S. ; et al.	2011-07-14
Structure And Method For Improving Storage Latch Susceptibility To Single Event Upsets App 20110163365 - Cannon; Ethan H. ; et al.	2011-07-07
Structure and method for improving storage latch susceptibility to single event upsets Grant 7,965,540 - Cannon , et al. June 21, 2	2011-06-21
Methods for fabricating a metal-oxide-semiconductor device structure Grant 7,951,660 - Furukawa , et al. May 31, 2	2011-05-31
Method of forming a planar field effect transistor with embedded and faceted source/drain stressors on a silicon-on-insulator (S0I) wafer, a planar field effect transistor structure and a design structure for the planar field effect transistor Grant 7,951,657 - Cheng , et al. May 31, 2	2011-05-31
Semispherical Integrated Circuit Structures App 20110115054 - Cheng; Kangguo ; et al.	2011-05-19
Anti-fuse device structure and electroplating circuit structure and method Grant 7,935,621 - Basker , et al. May 3, 2	2011-05-03
Reduced floating body effect without impact on performance-enhancing stress Grant 7,936,017 - Clark, Jr. , et al. May 3, 2	2011-05-03
Creating Extremely Thin Semiconductor-on-insulator (etsoi) Having Substantially Uniform Thickness App 20110095393 - Berliner; Nathaniel C. ; et al.	2011-04-28
Forming An Extremely Thin Semiconductor-on-insulator (etsoi) Layer App 20110095366 - Abadeer; Wagdi W. ; et al.	2011-04-28
Method Of Creating An Extremely Thin Semiconductor-on- Insulator (etsoi) Layer Having A Uniform Thickness App 20110097824 - BERLINER; Nathaniel C. ; et al.	2011-04-28
Source/drain junction for high performance MOSFET formed by selective EPI process Grant 7,932,136 - Hua , et al. April 26, 2	2011-04-26
Carbon nanotube conductor for trench capacitors Grant 7,932,549 - Holmes , et al. April 26, 2	2011-04-26
Phase change memory cell with vertical transistor Grant 7,932,167 - Furukawa , et al. April 26, 2	2011-04-26
Layer patterning using double exposure processes in a single photoresist layer Grant 7,923,202 - Furukawa , et al. April 12, 2	2011-04-12
Passive electrically testable acceleration and voltage measurement devices Grant 7,898,045 - Furukawa , et al. March 1, 2	2011-03-01
Selective deposition of germanium spacers on nitride Grant 7,888,241 - Chakravarti , et al. February 15, 2	2011-02-15
Band gap modulated optical sensor Grant 7,888,266 - Cheng , et al. February 15, 2	2011-02-15
Immersion lithography with equalized pressure on at least projection optics component and wafer Grant 7,889,317 - Furukawa , et al. February 15, 2	2011-02-15
Selective Deposition Of Germanium Spacers On Nitride App 20110034000 - Chakravarti; Ashima B. ; et al.	2011-02-10
Shared Gate For Conventional Planar Device And Horizontal Cnt App 20110027951 - Furukawa; Toshiharu ; et al.	2011-02-03
Method For Double Pattern Density App 20110021010 - Cheng; Kangguo ; et al.	2011-01-27
Integrated Circuit Structure Manufacturing Methods Using Hard Mask And Photoresist Combination App 20100330756 - Basker; Veeraraghavan S. ; et al.	2010-12-30
Methods and structures for promoting stable synthesis of carbon nanotubes Grant 7,851,064 - Furukawa , et al. December 14, 2	2010-12-14
Method Of Forming A Planar Field Effect Transistor With Embedded And Faceted Source/drain Stressors On A Silicon-on-insulator (soi) Wafer, A Planar Field Effect Transistor Structure And A Design Structure For The Planar Field Effect Transistor App 20100295127 - Cheng; Kangguo ; et al.	2010-11-25
Shared gate for conventional planar device and horizontal CNT Grant 7,838,943 - Furukawa , et al. November 23, 2	2010-11-23
Vertical carbon nanotube field effect transistors and arrays Grant 7,829,883 - Furukawa , et al. November 9, 2	2010-11-09
Layout and process to contact sub-lithographic structures Grant 7,825,525 - Furukawa , et al. November 2, 2	2010-11-02
Method of Making Integrated Circuit Chip Utilizing Oriented Carbon Nanotube Conductive Layers App 20100273298 - Furukawa; Toshiharu ; et al.	2010-10-28
Methods of fabricating vertical carbon nanotube field effect transistors for arrangement in arrays and field effect transistors and arrays formed thereby Grant 7,820,502 - Furukawa , et al. October 26, 2	2010-10-26
Microelectronic structure by selective deposition Grant 7,816,743 - Furukawa , et al. October 19, 2	2010-10-19
Semiconductor structures for latch-up suppression and methods of forming such semiconductor structures Grant 7,791,145 - Furukawa , et al. September 7, 2	2010-09-07
Integrated circuit chip utilizing oriented carbon nanotube conductive layers Grant 7,786,583 - Furukawa , et al. August 31, 2	2010-08-31
Complementary metal oxide semiconductor device with an electroplated metal replacement gate Grant 7,776,680 - Basker , et al. August 17, 2	2010-08-17
Reduced mask count gate conductor definition Grant 7,771,604 - Furukawa , et al. August 10, 2	2010-08-10
Design structure incorporating a hybrid substrate Grant 7,750,406 - Cannon , et al. July 6, 2	2010-07-06
Well isolation trenches (WIT) for CMOS devices Grant 7,737,504 - Furukawa , et al. June 15, 2	2010-06-15
Epitaxial imprinting Grant 7,732,865 - Furukawa , et al. June 8, 2	2010-06-08
Methods and semiconductor structures for latch-up suppression using a conductive region Grant 7,727,848 - Furukawa , et al. June 1, 2	2010-06-01
Selective deposition of germanium spacers on nitride Grant 7,705,385 - Chakravarti , et al. April 27, 2	2010-04-27
Method for fabricating strained silicon-on-insulator structures and strained silicon-on-insulator structures formed thereby Grant 7,704,855 - Furukawa , et al. April 27, 2	2010-04-27
Sidewall image transfer processes for forming multiple line-widths Grant 7,699,996 - Furukawa , et al. April 20, 2	2010-04-20
Vertical nanotube semiconductor device structures and methods of forming the same Grant 7,691,720 - Furukawa , et al. April 6, 2	2010-04-06
Method of forming a dual gated FinFET gain cell Grant 7,674,674 - Furukawa , et al. March 9, 2	2010-03-09
SOI device with reduced junction capacitance Grant 7,671,413 - Furukawa March 2, 2	2010-03-02
Position/force control device Grant 7,672,741 - Ohnishi , et al. March 2, 2	2010-03-02
Non-volatile switching and memory devices using vertical nanotubes Grant 7,668,004 - Furukawa , et al. February 23, 2	2010-02-23
Methods and structure for forming self-aligned borderless contacts for strain engineered logic devices Grant 7,659,171 - Furukawa , et al. February 9, 2	2010-02-09
Methods and semiconductor structures for latch-up suppression using a conductive region Grant 7,655,985 - Furukawa , et al. February 2, 2	2010-02-02
Hybrid substrates and methods for forming such hybrid substrates Grant 7,651,902 - Cannon , et al. January 26, 2	2010-01-26
Shallow trench isolation formation Grant 7,652,334 - Furukawa , et al. January 26, 2	2010-01-26
Method of fabricating semiconductor structures for latch-up suppression Grant 7,648,869 - Chang , et al. January 19, 2	2010-01-19
Method and apparatus for cleaning a semiconductor substrate in an immersion lithography system Grant 7,648,819 - Holmes , et al. January 19, 2	2010-01-19
Immersion optical lithography system having protective optical coating Grant 7,646,469 - Holmes , et al. January 12, 2	2010-01-12
Semiconductor structures for latch-up suppression and methods of forming such semiconductor structures Grant 7,645,676 - Furukawa , et al. January 12, 2	2010-01-12
VERTICAL PROFILE FinFET GATE FORMED VIA PLATING UPON A THIN GATE DIELECTRIC App 20090321833 - Basker; Veeraraghaven S. ; et al.	2009-12-31
Band Gap Modulated Optical Sensor App 20090325337 - Cheng; Kangguo ; et al.	2009-12-31
Band Gap Modulated Optical Sensor App 20090321786 - Cheng; Kangguo ; et al.	2009-12-31
Passive electrically testable acceleration and voltage measurement devices Grant 7,629,192 - Furukawa , et al. December 8, 2	2009-12-08
Reduced Floating Body Effect Without Impact on Performance-Enhancing Stress App 20090283828 - Clark, JR.; William F. ; et al.	2009-11-19
Complementary Metal Oxide Semiconductor Device With An Electroplated Metal Replacement Gate App 20090275179 - Basker; Veeraraghavan S. ; et al.	2009-11-05
Source/drain Junction For High Performance Mosfet Formed By Selective Epi Process App 20090267149 - Hua; Xuefeng ; et al.	2009-10-29
Micro-electro-mechanical valves and pumps and methods of fabricating same Grant 7,607,455 - Furukawa , et al. October 27, 2	2009-10-27
Method For Monitoring Patterning Integrity Of Etched Openings And Forming Conductive Structures With The Openings App 20090255818 - Basker; Veeraraghavan S. ; et al.	2009-10-15
Carbon nanotubes as low voltage field emission sources for particle precipitators Grant 7,601,205 - Furukawa , et al. October 13, 2	2009-10-13
Structure And Method For Improving Storage Latch Susceptibility To Single Event Upsets App 20090244954 - Cannon; Ethan H. ; et al.	2009-10-01
Sub-lithographic imaging techniques and processes Grant 7,585,614 - Furukawa , et al. September 8, 2	2009-09-08
Methods of forming low-k dielectric layers containing carbon nanostructures Grant 7,579,272 - Furukawa , et al. August 25, 2	2009-08-25
Anti-fuse Device Structure And Electroplating Circuit Structure And Method App 20090206447 - Basker; Veeraraghavan S. ; et al.	2009-08-20
Method of forming a dual gated FinFET gain cell Grant 7,566,613 - Furukawa , et al. July 28, 2	2009-07-28
Methods for forming a wrap-around gate field effect transistor Grant 7,560,347 - Furukawa , et al. July 14, 2	2009-07-14
Implantation of gate regions in semiconductor device fabrication Grant 7,557,023 - Furukawa , et al. July 7, 2	2009-07-07
Vertical carbon nanotube transistor integration Grant 7,535,016 - Furukawa , et al. May 19, 2	2009-05-19
Field Effect Transistor App 20090121298 - Furukawa; Toshiharu ; et al.	2009-05-14
Carbon Nanotube Structures For Enhancement Of Thermal Dissipation From Semiconductor Modules App 20090121343 - Basker; Veeraraghavan S. ; et al.	2009-05-14
Accessible chip stack and process of manufacturing thereof Grant 7,528,494 - Furukawa , et al. May 5, 2	2009-05-05
Wiring paterns formed by selective metal plating Grant 7,521,808 - Furukawa , et al. April 21, 2	2009-04-21
Multiple layer and crystal plane orientation semiconductor substrate Grant 7,521,735 - Furukawa , et al. April 21, 2	2009-04-21
Soft error reduction of CMOS circuits on substrates with hybrid crystal orientation using buried recombination centers Grant 7,521,776 - Cannon , et al. April 21, 2	2009-04-21
Method of forming optical sensor that includes three pairs of electrodes formed at different depths in a semiconductor substrate Grant 7,517,716 - Furukawa , et al. April 14, 2	2009-04-14
Method And Apparatus For Cleaning A Semiconductor Substrate In An Immersion Lithography System App 20090087795 - Holmes; Steven J. ; et al.	2009-04-02
Microelectronic structure by selective deposition Grant 7,510,939 - Furukawa , et al. March 31, 2	2009-03-31
Microelectronic Structure By Selective Deposition App 20090075439 - Furukawa; Toshiharu ; et al.	2009-03-19
Microelectronic Structure By Selective Deposition App 20090072317 - Furukawa; Toshiharu ; et al.	2009-03-19
Method for fabricating oxygen-implanted silicon on insulation type semiconductor and semiconductor formed therefrom Grant 7,504,314 - Furukawa , et al. March 17, 2	2009-03-17
Micro-electro-mechanical valves and pumps Grant 7,505,110 - Furukawa , et al. March 17, 2	2009-03-17
Methods For Forming Self-aligned Borderless Contacts For Strain Engineered Logic Devices And Structure Thereof App 20090057730 - Furukawa; Toshiharu ; et al.	2009-03-05
Immersion optical lithography system having protective optical coating Grant 7,495,743 - Holmes , et al. February 24, 2	2009-02-24
Nitridation of STI fill oxide to prevent the loss of STI fill oxide during manufacturing process Grant 7,491,964 - Buehrer , et al. February 17, 2	2009-02-17
Nitridation of STI fill oxide to prevent the loss of STI fill oxide during manufacturing process Grant 7,491,563 - Buehrer , et al. February 17, 2	2009-02-17
Methods and semiconductor structures for latch-up suppression using a conductive region Grant 7,491,618 - Furukawa , et al. February 17, 2	2009-02-17
Electric fuses using CNTs (carbon nanotubes) Grant 7,492,046 - Furukawa , et al. February 17, 2	2009-02-17
Method of doping a gate electrode of a field effect transistor Grant 7,491,631 - Furukawa , et al. February 17, 2	2009-02-17
Layer Patterning Using Double Exposure Processes In A Single Photoresist Layer App 20090035708 - Furukawa; Toshiharu ; et al.	2009-02-05
Memory devices using carbon nanotube (CNT) technologies Grant 7,483,285 - Furukawa , et al. January 27, 2	2009-01-27
Carbon Nanotube Conductor For Trench Capacitors App 20090014767 - Furukawa; Toshiharu ; et al.	2009-01-15
Method for making integrated circuit chip having carbon nanotube composite interconnection vias Grant 7,473,633 - Furukawa , et al. January 6, 2	2009-01-06
Digital Circuits Having Additional Capacitors For Additional Stability App 20090001481 - Cannon; Ethan Harrison ; et al.	2009-01-01
Phase Change Memory Cell with Vertical Transistor App 20090001337 - Furukawa; Toshiharu ; et al.	2009-01-01
CMOS Gate Structures Fabricated by Selective Oxidation App 20080286971 - Doris; Bruce B. ; et al.	2008-11-20
Methods And Semiconductor Structures For Latch-up Suppression Using A Conductive Region App 20080268610 - Furukawa; Toshiharu ; et al.	2008-10-30
Passive Electrically Testable Acceleration And Voltage Measurement Devices App 20080258246 - Furukawa; Toshiharu ; et al.	2008-10-23
Dual Gated Finfet Gain Cell App 20080261363 - Furukawa; Toshiharu ; et al.	2008-10-23
Design Structure Incorporating a Hybrid Substrate App 20080258222 - Cannon; Ethan Harrison ; et al.	2008-10-23
Hybrid Substrates and Methods for Forming Such Hybrid Substrates App 20080258181 - Cannon; Ethan Harrison ; et al.	2008-10-23
Carbon Nanotubes As Low Voltage Field Emission Sources for Particle Precipitators App 20080257156 - Furukawa; Toshiharu ; et al.	2008-10-23
CMOS gate structures fabricated by selective oxidation Grant 7,439,144 - Doris , et al. October 21, 2	2008-10-21
Method for making integrated circuit chip utilizing oriented carbon nanotube conductive layers Grant 7,439,081 - Furukawa , et al. October 21, 2	2008-10-21
Methods for forming a wrap-around gate field effect transistor Grant 7,435,653 - Furukawa , et al. October 14, 2	2008-10-14
Micro-electro-mechanical Valves And Pumps And Methods Of Fabricating Same App 20080245984 - Furukawa; Toshiharu ; et al.	2008-10-09
Selective Deposition of Germanium Spacers on Nitride App 20080242041 - Chakravarti; Ashima B. ; et al.	2008-10-02
Methods For Fabricating Semiconductor Device Structures With Reduced Susceptibility To Latch-up And Semiconductor Device Structures Formed By The Methods App 20080242016 - Cannon; Ethan Harrison ; et al.	2008-10-02
Vertical Nanotube Semiconductor Device Structures And Methods Of Forming The Same App 20080227264 - Furukawa; Toshiharu ; et al.	2008-09-18
Immersion optical lithography system having protective optical coating App 20080225251 - Holmes; Steven J. ; et al.	2008-09-18
Semiconductor-on-insulator(soi) Structures Including Gradient Nitrided Buried Oxide (box) App 20080224256 - Chou; Anthony I. ; et al.	2008-09-18
Methods And Semiconductor Structures For Latch-up Suppression Using A Conductive Region App 20080217698 - Furukawa; Toshiharu ; et al.	2008-09-11
Methods Of Forming Gas Dielectric And Related Structure App 20080217730 - Furukawa; Toshiharu ; et al.	2008-09-11
Methods For Fabricating Semiconductor Device Structures With Reduced Susceptibility To Latch-up And Semiconductor Device Structures Formed By The Methods App 20080203492 - Cannon; Ethan Harrison ; et al.	2008-08-28
Wrap-around Gate Field Effect Transistor App 20080206937 - Furukawa; Toshiharu ; et al.	2008-08-28
Sidewall Image Transfer Processes For Forming Multiple Line-widths App 20080206996 - Furukawa; Toshiharu ; et al.	2008-08-28
Bipolar Transistor Using Selective Dielectric Deposition And Methods For Fabrication Thereof App 20080203536 - Furukawa; Toshiharu ; et al.	2008-08-28
Mandrel/trim Alignment In Sit Processing App 20080188080 - Furukawa; Toshiharu ; et al.	2008-08-07
Carbon nanotubes as low voltage field emission sources for particle precipitators Grant 7,402,194 - Furukawa , et al. July 22, 2	2008-07-22
Semiconductor Transistors With Contact Holes Close To Gates App 20080166863 - Furukawa; Toshiharu ; et al.	2008-07-10
Immersion Lithography With Equalized Pressure On At Least Projection Optics Component And Wafer App 20080165335 - Furukawa; Toshiharu ; et al.	2008-07-10
High performance single event upset hardened SRAM cell Grant 7,397,692 - Cannon , et al. July 8, 2	2008-07-08
Semiconductor-on-insulator (SOI) structures including gradient nitrided buried oxide (BOX) Grant 7,396,776 - Chou , et al. July 8, 2	2008-07-08
Soft Error Reduction Of Cmos Circuits On Substrates With Hybrid Crystal Orientation Using Buried Recombination Centers App 20080157202 - Cannon; Ethan H. ; et al.	2008-07-03
Methods And Structures For Promoting Stable Synthesis Of Carbon Nanotubes App 20080160312 - Furukawa; Toshiharu ; et al.	2008-07-03
Shrinking contact apertures through LPD oxide Grant 7,393,779 - Furukawa , et al. July 1, 2	2008-07-01
Semiconductor Optical Sensors App 20080153195 - Furukawa; Toshiharu ; et al.	2008-06-26
Layout And Process To Contact Sub-lithographic Structures App 20080142995 - Furukawa; Toshiharu ; et al.	2008-06-19
High Performance Single Event Upset Hardened Sram Cell App 20080144348 - Cannon; Ethan Harrison ; et al.	2008-06-19
Methods for providing gate conductors on semiconductors and semiconductors formed thereby Grant 7,387,974 - Holmes , et al. June 17, 2	2008-06-17
Non-volatile Switching And Memory Devices Using Vertical Nanotubes App 20080137397 - Furukawa; Toshiharu ; et al.	2008-06-12
Immersion lithography with equalized pressure on at least projection optics component and wafer Grant 7,385,673 - Furukawa , et al. June 10, 2	2008-06-10
Memory devices using carbon nanotube (CNT) technologies Grant 7,385,839 - Furukawa , et al. June 10, 2	2008-06-10
Shallow trench isolation method for shielding trapped charge in a semiconductor device Grant 7,385,275 - Cannon , et al. June 10, 2	2008-06-10
Semiconductor Devices With Buried Isolation Regions App 20080128811 - Furukawa; Toshiharu ; et al.	2008-06-05
Semiconductor transistors with contact holes close to gates Grant 7,381,610 - Furukawa , et al. June 3, 2	2008-06-03
Mandrel/trim alignment in SIT processing Grant 7,381,655 - Furukawa , et al. June 3, 2	2008-06-03
Semiconductor optical sensors Grant 7,378,717 - Furukawa , et al. May 27, 2	2008-05-27
Memory Devices Using Carbon Nanotube (cnt) Technologies App 20080117671 - Furukawa; Toshiharu ; et al.	2008-05-22
Shallow Trench Isolation Structure For Shielding Trapped Charge In A Semiconductor Device App 20080116529 - Cannon; Ethan Harrison ; et al.	2008-05-22
Methods and structures for promoting stable synthesis of carbon nanotubes Grant 7,374,793 - Furukawa , et al. May 20, 2	2008-05-20
Y-shaped carbon nanotubes as AFM probe for analyzing substrates with angled topography Grant 7,368,712 - Boye , et al. May 6, 2	2008-05-06
Multiple Layer And Crystal Plane Orientation Semiconductor Substrate App 20080102566 - Furukawa; Toshiharu ; et al.	2008-05-01
Multiple Layer And Cyrstal Plane Orientation Semiconductor Substrate App 20080099844 - Furukawa; Toshiharu ; et al.	2008-05-01
Method and apparatus for cleaning a semiconductor substrate in an immersion lithography system Grant 7,362,412 - Holmes , et al. April 22, 2	2008-04-22
Nitridation of STI Fill Oxide to Prevent the Loss of STI Fill Oxide During Manufacturing Process App 20080090379 - Buehrer; Fred ; et al.	2008-04-17
Pattern density control using edge printing processes Grant 7,358,140 - Furukawa , et al. April 15, 2	2008-04-15
Triple-well CMOS devices with increased latch-up immunity and methods of fabricating same Grant 7,358,573 - Cecchi , et al. April 15, 2	2008-04-15
Silicon-on-insulator (SOI) read only memory (ROM) array and method of making a SOI ROM Grant 7,358,120 - Furukawa , et al. April 15, 2	2008-04-15
Method Of Forming Lithographic And Sub-lithographic Dimensioned Structures App 20080085600 - Furukawa; Toshiharu ; et al.	2008-04-10
Methods for forming uniform lithographic features Grant 7,351,648 - Furukawa , et al. April 1, 2	2008-04-01
Semiconductor devices with buried isolation regions Grant 7,352,030 - Furukawa , et al. April 1, 2	2008-04-01
Non-volatile switching and memory devices using vertical nanotubes Grant 7,352,607 - Furukawa , et al. April 1, 2	2008-04-01
Layout and process to contact sub-lithographic structures Grant 7,351,666 - Furukawa , et al. April 1, 2	2008-04-01
Shallow trench isolation formation Grant 7,348,634 - Furukawa , et al. March 25, 2	2008-03-25
Multiple layer and crystal plane orientation semiconductor substrate Grant 7,348,610 - Furukawa , et al. March 25, 2	2008-03-25
Wiring patterns formed by selective metal plating Grant 7,345,370 - Furukawa , et al. March 18, 2	2008-03-18
Semiconductor Structures For Latch-up Suppression And Methods Of Forming Such Semiconductor Structures App 20080057671 - Furukawa; Toshiharu ; et al.	2008-03-06
Method For Fabricating Strained Silicon-on-insulator Structures And Strained Silicon-on-insulator Structures Formed Thereby App 20080050931 - Furukawa; Toshiharu ; et al.	2008-02-28
Borderless contact structures Grant 7,335,930 - Furukawa , et al. February 26, 2	2008-02-26
Methods Of Fabricating Vertical Carbon Nanotube Field Effect Transistors For Arrangement In Arrays And Field Effect Transistors And Arrays Formed Thereby App 20080044954 - Furukawa; Toshiharu ; et al.	2008-02-21
Integrated Circuit Chip Utilizing Oriented Carbon Nanotube Conductive Layers App 20080042287 - Furukawa; Toshiharu ; et al.	2008-02-21
Vertical field effect transistors incorporating semiconducting nanotubes grown in a spacer-defined passage Grant 7,329,567 - Furukawa , et al. February 12, 2	2008-02-12
Structure and method for forming semiconductor wiring levels using atomic layer deposition Grant 7,329,613 - Furukawa , et al. February 12, 2	2008-02-12
SOI device with reduced junction capacitance Grant 7,323,370 - Furukawa January 29, 2	2008-01-29
Shallow Trench Isolation Formation App 20080017932 - Furukawa; Toshiharu ; et al.	2008-01-24
Semiconductor-on-insulator (SOI) structures including gradient nitrided buried oxide (BOX) App 20080014740 - Chou; Anthony I. ; et al.	2008-01-17
Soi Device With Reduced Junction Capacitance App 20080006901 - Furukawa; Toshiharu	2008-01-10
Microelectronic Structure By Selective Deposition App 20080001225 - Furukawa; Toshiharu ; et al.	2008-01-03
Immersion optical lithography system having protective optical coating App 20070296947 - Holmes; Steven J. ; et al.	2007-12-27
Illumination Light In Immersion Lithography Stepper For Particle Or Bubble Detection App 20070296937 - Furukawa; Toshiharu ; et al.	2007-12-27
Method And Structure For Forming Self-planarizing Wiring Layers In Multilevel Electronic Devices App 20070290394 - Furukawa; Toshiharu ; et al.	2007-12-20
ELECTRIC FUSES USING CNTs (CARBON NANOTUBES) App 20070262450 - Furukawa; Toshiharu ; et al.	2007-11-15
Selective post-doping of gate structures by means of selective oxide growth Grant 7,288,814 - Chou , et al. October 30, 2	2007-10-30
Semiconductor Structures For Latch-up Suppression And Methods Of Forming Such Semiconductor Structures App 20070241409 - Furukawa; Toshiharu ; et al.	2007-10-18
Well Isolation Trenches (wit) For Cmos Devices App 20070241408 - Furukawa; Toshiharu ; et al.	2007-10-18
Borderless Contact Structures App 20070241412 - Furukawa; Toshiharu ; et al.	2007-10-18
Method of forming fet with T-shaped gate Grant 7,282,423 - Furukawa , et al. October 16, 2	2007-10-16
Method Of Doping A Gate Electrode Of A Field Effect Transistor App 20070228429 - Furukawa; Toshiharu ; et al.	2007-10-04
Semiconductor structures for latch-up suppression and methods of forming such semiconductor structures Grant 7,276,768 - Furukawa , et al. October 2, 2	2007-10-02
Layout and process to contact sub-lithographic structures App 20070215874 - Furukawa; Toshiharu ; et al.	2007-09-20
Micro-electro-mechanical Valves And Pumps And Methods Of Fabricating Same App 20070215224 - Furukawa; Toshiharu ; et al.	2007-09-20
Wafer cell for immersion lithography Grant 7,271,878 - Furukawa , et al. September 18, 2	2007-09-18
Method of doping a gate electrode of a field effect transistor Grant 7,271,079 - Furukawa , et al. September 18, 2	2007-09-18
Wrap-around gate field effect transistor Grant 7,271,444 - Furukawa , et al. September 18, 2	2007-09-18
Well isolation trenches (WIT) for CMOS devices Grant 7,268,028 - Furukawa , et al. September 11, 2	2007-09-11
Triple-well CMOS devices with increased latch-up immunity and methods of fabricating same Grant 7,268,400 - Cecchi , et al. September 11, 2	2007-09-11
Formation Of A Disposable Spacer To Post Dope A Gate Conductor App 20070205472 - Horak; David V. ; et al.	2007-09-06
Wiring Paterns Formed By Selective Metal Plating App 20070207604 - Furukawa; Toshiharu ; et al.	2007-09-06
Methods of forming alternating phase shift masks having improved phase-shift tolerance Grant 7,264,415 - Furukawa , et al. September 4, 2	2007-09-04
Sidewall image transfer (SIT) technologies Grant 7,265,013 - Furukawa , et al. September 4, 2	2007-09-04
Methods for fabricating semiconductor device structures with reduced susceptibility to latch-up and semiconductor device structures formed by the methods App 20070194403 - Cannon; Ethan Harrison ; et al.	2007-08-23
Enhanced Silicon-on-insulator (soi) Transistors And Methods Of Making Enhanced Soi Transistors App 20070190740 - Furukawa; Toshiharu ; et al.	2007-08-16
CMOS Gate Structures Fabricated By Selective Oxidation App 20070190713 - Doris; Bruce B. ; et al.	2007-08-16
Shallow Trench Isolation Structure For Shielding Trapped Charge In A Semiconductor Device App 20070187778 - Cannon; Ethan Harrison ; et al.	2007-08-16
Process for oxide cap formation in semiconductor manufacturing Grant 7,256,114 - Holmes , et al. August 14, 2	2007-08-14
Integrated Circuit Chip Utilizing Dielectric Layer Having Oriented Cylindrical Voids Formed from Carbon Nanotubes App 20070184647 - Furukawa; Toshiharu ; et al.	2007-08-09
Wrap-around Gate Field Effect Transistor App 20070184588 - Furukawa; Toshiharu ; et al.	2007-08-09
Triple-well Cmos Devices With Increased Latch-up Immunity And Methods Of Fabricating Same App 20070178639 - Cecchi; Delbert R. ; et al.	2007-08-02
Double-gate FETs (Field Effect Transistors) Grant 7,250,347 - Furukawa , et al. July 31, 2	2007-07-31
Enhanced silicon-on-insulator (SOI) transistors and methods of making enhanced SOI transistors Grant 7,250,351 - Furukawa , et al. July 31, 2	2007-07-31
Semiconductor structures for latch-up suppression and methods of forming such semiconductor structures App 20070170518 - Furukawa; Toshiharu ; et al.	2007-07-26
Triple-well Cmos Devices With Increased Latch-up Immunity And Methods Of Fabricating Same App 20070170516 - Cecchi; Delbert R. ; et al.	2007-07-26
Methods and semiconductor structures for latch-up suppression using a conductive region App 20070170543 - Furukawa; Toshiharu ; et al.	2007-07-26
CMOS devices adapted to reduce latchup and methods of manufacturing the same App 20070170517 - Furukawa; Toshiharu ; et al.	2007-07-26
Methods for forming uniform lithographic features App 20070166981 - Furukawa; Toshiharu ; et al.	2007-07-19
Methods and semiconductor structures for latch-up suppression using a buried damage layer App 20070158779 - Cannon; Ethan Harrison ; et al.	2007-07-12
Methods and semiconductor structures for latch-up suppression using a buried conductive region App 20070158755 - Chang; Shunhua Thomas ; et al.	2007-07-12
Epitaxial Imprinting App 20070145373 - Furukawa; Toshiharu ; et al.	2007-06-28
Implantation Of Gate Regions In Semiconductor Device Fabrication App 20070148935 - Furukawa; Toshiharu ; et al.	2007-06-28
Low-k dielectric layer based upon carbon nanostructures Grant 7,233,071 - Furukawa , et al. June 19, 2	2007-06-19
Borderless contact structures Grant 7,233,063 - Furukawa , et al. June 19, 2	2007-06-19
Memory Devices Using Carbon Nanotube (cnt) Technologies App 20070133266 - Furukawa; Toshiharu ; et al.	2007-06-14
Formation of a disposable spacer to post dope a gate conductor Grant 7,229,885 - Horak , et al. June 12, 2	2007-06-12
Method and apparatus for immersion lithography Grant 7,230,681 - Holmes , et al. June 12, 2	2007-06-12
Methods for metal plating of gate conductors and semiconductors formed thereby Grant 7,229,889 - Holmes , et al. June 12, 2	2007-06-12
Integrated circuit chip utilizing dielectric layer having oriented cylindrical voids formed from carbon nanotubes Grant 7,229,909 - Furukawa , et al. June 12, 2	2007-06-12
Y-shaped Carbon Nanotubes As Afm Probe For Analyzing Substrates With Angled Topography App 20070125946 - Boye; Carol A. ; et al.	2007-06-07
Silicon-on-insulator (soi) Read Only Memory (rom) Array And Method Of Making A Soi Rom App 20070128813 - Furukawa; Toshiharu ; et al.	2007-06-07
Silicon-on-insulator (SOI) Read Only Memory (ROM) array and method of making a SOI ROM Grant 7,227,233 - Furukawa , et al. June 5, 2	2007-06-05
Methods Of Forming Low-k Dielectric Layers Containing Carbon Nanostructures App 20070123028 - Furukawa; Toshiharu ; et al.	2007-05-31
Semiconductor Optical Sensors App 20070108473 - Furukawa; Toshiharu ; et al.	2007-05-17
Position/force control device App 20070112466 - Ohnishi; Kouhei ; et al.	2007-05-17
Structure and method for thin box SOI device Grant 7,217,604 - Furukawa , et al. May 15, 2	2007-05-15
Epitaxial imprinting Grant 7,217,629 - Furukawa , et al. May 15, 2	2007-05-15
Pattern Density Control Using Edge Printing Processes App 20070105319 - Furukawa; Toshiharu ; et al.	2007-05-10
Semiconductor Transistors With Contact Holes Close To Gates App 20070102766 - Furukawa; Toshiharu ; et al.	2007-05-10
Shrinking Contact Apertures Through LPD Oxide App 20070099416 - Furukawa; Toshiharu ; et al.	2007-05-03
Accessible chip stack and process of manufacturing thereof App 20070096263 - Furukawa; Toshiharu ; et al.	2007-05-03
Vertical field effect transistors incorporating semiconducting nanotubes grown in a spacer-defined passage Grant 7,211,844 - Furukawa , et al. May 1, 2	2007-05-01
Passive Electrically Testable Acceleration And Voltage Measurement Devices App 20070085156 - Furukawa; Toshiharu ; et al.	2007-04-19
Immersion Optical Lithography System Having Protective Optical Coating App 20070076179 - Holmes; Steven J. ; et al.	2007-04-05
Sidewall Image Transfer (sit) Technologies App 20070066009 - Furukawa; Toshiharu ; et al.	2007-03-22
Mandrel/trim alignment in SIT processing App 20070059891 - Furukawa; Toshiharu ; et al.	2007-03-15
Silicon-on-insulator (soi) Read Only Memory (rom) Array And Method Of Making A Soi Rom App 20070057323 - Furukawa; Toshiharu ; et al.	2007-03-15
Selective Deposition Of Germanium Spacers On Nitride App 20070059894 - Chakravarti; Ashima B. ; et al.	2007-03-15
Carbon Nanotubes As Low Voltage Field Emission Sources For Particle Precipitators App 20070051237 - Furukawa; Toshiharu ; et al.	2007-03-08
Integrated Circuit Chip Utilizing Oriented Carbon Nanotube Conductive Layers App 20070048879 - Furukawa; Toshiharu ; et al.	2007-03-01
Vertical dual gate field effect transistor Grant 7,176,089 - Furukawa , et al. February 13, 2	2007-02-13
Finfet Gate Formed Of Carbon Nanotubes App 20070023839 - Furukawa; Toshiharu ; et al.	2007-02-01
Non-volatile Switching And Memory Devices Using Vertical Nanotubes App 20070025138 - Furukawa; Toshiharu ; et al.	2007-02-01
Shared Gate For Conventional Planar Device And Horizontal Cnt App 20070021293 - Furukawa; Toshiharu ; et al.	2007-01-25
Epitaxial imprinting App 20070013001 - Furukawa; Toshiharu ; et al.	2007-01-18
Forming gate oxides having multiple thicknesses Grant 7,160,771 - Chou , et al. January 9, 2	2007-01-09
Method For Making Integrated Circuit Chip Having Carbon Nanotube Composite Interconnection Vias App 20060292861 - Furukawa; Toshiharu ; et al.	2006-12-28
Immersion Lithography With Equalized Pressure On At Least Projection Optics Component And Wafer App 20060289794 - Furukawa; Toshiharu ; et al.	2006-12-28
Integrated circuit chip utilizing carbon nanotube composite interconnection vias Grant 7,135,773 - Furukawa , et al. November 14, 2	2006-11-14
Methods of implementing and enhanced silicon-on-insulator (SOI) box structures Grant 7,129,138 - Furukawa , et al. October 31, 2	2006-10-31
Integrated circuit chip utilizing oriented carbon nanotube conductive layers Grant 7,129,097 - Furukawa , et al. October 31, 2	2006-10-31
Enhanced silicon-on-insulator (SOI) transistors and methods of making enhanced SOI transistors App 20060231892 - Furukawa; Toshiharu ; et al.	2006-10-19
Methods Of Implementing And Enhanced Silicon-on-insulator (soi) Box Structures App 20060234428 - Furukawa; Toshiharu ; et al.	2006-10-19
Method For Fabricating Oxygen-implanted Silicon On Insulation Type Semiconductor And Semiconductor Formed Therefrom App 20060226480 - Furukawa; Toshiharu ; et al.	2006-10-12
Method Of Doping A Gate Electrode Of A Field Effect Transistor App 20060228835 - Furukawa; Toshiharu ; et al.	2006-10-12
Implantation of gate regions in semiconductor device fabrication Grant 7,118,997 - Furukawa , et al. October 10, 2	2006-10-10
Shallow trench isolation formation App 20060220148 - Furukawa; Toshiharu ; et al.	2006-10-05
Horizontal memory gain cells Grant 7,109,546 - Furukawa , et al. September 19, 2	2006-09-19
Methods For Providing Gate Conductors On Semiconductors And Semiconductors Formed Thereby App 20060202239 - Holmes; Steven J. ; et al.	2006-09-14
Methods For Metal Plating Of Gate Conductors And Semiconductors Formed Thereby App 20060205123 - Holmes; Steven J. ; et al.	2006-09-14
Structure And Method For Forming Semiconductor Wiring Levels Using Atomic Layer Deposition App 20060205226 - Furukawa; Toshiharu ; et al.	2006-09-14
Strained semiconductor device structures Grant 7,102,201 - Furukawa , et al. September 5, 2	2006-09-05
Multiple Layer And Crystal Plane Orientation Semiconductor Substrate App 20060186416 - Furukawa; Toshiharu ; et al.	2006-08-24
Shallow trench isolation formation Grant 7,087,531 - Furukawa , et al. August 8, 2	2006-08-08
Implantation Of Gate Regions In Semiconductor Device Fabrication App 20060172547 - Furukawa; Toshiharu ; et al.	2006-08-03
DOUBLE-GATE FETs (FIELD EFFECT TRANSISTORS) App 20060172496 - Furukawa; Toshiharu ; et al.	2006-08-03
Method of forming buried isolation regions in semiconductor substrates and semiconductor devices with buried isolation regions App 20060172479 - Furukawa; Toshiharu ; et al.	2006-08-03
Vertical Carbon Nanotube Transistor Integration App 20060169972 - Furukawa; Toshiharu ; et al.	2006-08-03
Structure And Method For Thin Box Soi Device App 20060172499 - Furukawa; Toshiharu ; et al.	2006-08-03
Forming capping layer over metal wire structure using selective atomic layer deposition Grant 7,084,060 - Furukawa , et al. August 1, 2	2006-08-01
Process For Oxide Cap Formation In Semiconductor Manufacturing App 20060166432 - Holmes; Steven John ; et al.	2006-07-27
Damascene gate multi-mesa MOSFET Grant 7,081,387 - Furukawa , et al. July 25, 2	2006-07-25
Shallow Trench Isolation Formation App 20060160363 - Furukawa; Toshiharu ; et al.	2006-07-20
Nitridation Of Sti Fill Oxide To Prevent The Loss Of Sti Fill Oxide During Manufacturing Process App 20060160322 - Buehrer; Fred ; et al.	2006-07-20
Borderless contact structures App 20060157743 - Furukawa; Toshiharu ; et al.	2006-07-20
Wiring Patterns Formed By Selective Metal Plating App 20060154463 - Furukawa; Toshiharu ; et al.	2006-07-13
Borderless contact structures Grant 7,074,666 - Furukawa , et al. July 11, 2	2006-07-11
Method of forming buried isolation regions in semiconductor substrates and semiconductor devices with buried isolation regions Grant 7,071,047 - Furukawa , et al. July 4, 2	2006-07-04
Integrated circuit chip utilizing dielectric layer having oriented cylindrical voids formed from carbon nanotubes App 20060128137 - Furukawa; Toshiharu ; et al.	2006-06-15
Method And Apparatus For Cleaning A Semiconductor Substrate In An Immersion Lithography System App 20060103818 - Holmes; Steven J. ; et al.	2006-05-18
Method And Apparatus For Immersion Lithography App 20060103830 - Holmes; Steven J. ; et al.	2006-05-18
Selective synthesis of semiconducting carbon nanotubes Grant 7,038,299 - Furukawa , et al. May 2, 2	2006-05-02
Reduced Mask Count Gate Conductor Definition App 20060073394 - Furukawa; Toshiharu ; et al.	2006-04-06
Low-k Dielectric Material Based Upon Carbon Nanotubes And Methods Of Forming Such Low-k Dielectric Materials App 20060073682 - Furukawa; Toshiharu ; et al.	2006-04-06
Sub-lithographic Imaging Techniques And Processes App 20060060562 - Furukawa; Toshiharu ; et al.	2006-03-23
Selective post-doping of gate structures by means of selective oxide growth App 20060057811 - Chou; Anthony I. ; et al.	2006-03-16
SOI device with reduced junction capacitance Grant 7,009,251 - Furukawa March 7, 2	2006-03-07
Alternating phase mask built by additive film deposition Grant 6,998,204 - Furukawa , et al. February 14, 2	2006-02-14
Method of independent P and N gate length control of FET device made by sidewall image transfer technique Grant 6,998,332 - Furukawa , et al. February 14, 2	2006-02-14
Irradiation assisted reactive ion etching Grant 6,995,051 - Furukawa , et al. February 7, 2	2006-02-07
Selective post-doping of gate structures by means of selective oxide growth Grant 6,995,065 - Chou , et al. February 7, 2	2006-02-07
Borderless contact structures App 20060024940 - Furukawa; Toshiharu ; et al.	2006-02-02
Integrated circuit chip utilizing oriented carbon nanotube conductive layers App 20060022221 - Furukawa; Toshiharu ; et al.	2006-02-02
Method of forming FinFET gates without long etches Grant 6,989,308 - Furukawa , et al. January 24, 2	2006-01-24
Method for forming narrow gate structures on sidewalls of a lithographically defined sacrificial material Grant 6,989,323 - Doris , et al. January 24, 2	2006-01-24
Method for fabricating strained semiconductor structures and strained semiconductor structures formed thereby App 20060011990 - Furukawa; Toshiharu ; et al.	2006-01-19
Dual gated finfet gain cell App 20060008927 - Furukawa; Toshiharu ; et al.	2006-01-12
Horizontal memory gain cells App 20050286293 - Furukawa, Toshiharu ; et al.	2005-12-29
Vertical field effect transistors incorporating semiconducting nanotubes grown in a spacer-defined passage App 20050266627 - Furukawa, Toshiharu ; et al.	2005-12-01
Dual gated finfet gain cell Grant 6,970,372 - Furukawa , et al. November 29, 2	2005-11-29
Method For Forming Narrow Gate Structures On Sidewalls Of A Lithographically Defined Sacrificial Material App 20050245008 - Doris, Bruce B. ; et al.	2005-11-03
Methods for fabricating a metal-oxide-semiconductor device structure and metal-oxide-semiconductor device structures formed thereby App 20050242378 - Furukawa, Toshiharu ; et al.	2005-11-03
Method of making sub-lithographic features Grant 6,960,510 - Deshpande , et al. November 1, 2	2005-11-01
Wafer cell for immersion lithography App 20050237501 - Furukawa, Toshiharu ; et al.	2005-10-27
Method for fabricating strained silicon-on-insulator structures and strained silicon-on insulator structures formed thereby App 20050227498 - Furukawa, Toshiharu ; et al.	2005-10-13
Methods of forming alternating phase shift masks having improved phase-shift tolerance App 20050202322 - Furukawa, Toshiharu ; et al.	2005-09-15
Method of forming FinFET gates without long etches App 20050202607 - Furukawa, Toshiharu ; et al.	2005-09-15
Semiconductor with contact contacting diffusion adjacent gate electrode Grant 6,940,134 - Furukawa , et al. September 6, 2	2005-09-06
Integrated circuit chip utilizing carbon nanotube composite interconnection vias App 20050189655 - Furukawa, Toshiharu ; et al.	2005-09-01
Increased capacitance trench capacitor Grant 6,936,879 - Furukawa , et al. August 30, 2	2005-08-30
Methods of fabricating vertical carbon nanotube field effect transistors for arrangement in arrays and field effect transistors and arrays formed thereby App 20050179029 - Furukawa, Toshiharu ; et al.	2005-08-18
Method for forming a uniform distribution of nitrogen in silicon oxynitride gate dielectric Grant 6,930,060 - Chou , et al. August 16, 2	2005-08-16
Vertical nanotube semiconductor device structures and methods of forming the same App 20050167655 - Furukawa, Toshiharu ; et al.	2005-08-04
Vertical field effect transistors incorporating semiconducting nanotubes grown in a spacer-defined passage App 20050167740 - Furukawa, Toshiharu ; et al.	2005-08-04
Methods using disposable and permanent films for diffusion and implantation doping Grant 6,924,200 - Furukawa , et al. August 2, 2	2005-08-02
Deliberate semiconductor film variation to compensate for radial processing differences, determine optimal device characteristics, or produce small productions Grant 6,919,277 - Furukawa , et al. July 19, 2	2005-07-19
Method of independent P and N gate length control of FET device made by sidewall image transfer technique App 20050153562 - Furukawa, Toshiharu ; et al.	2005-07-14
Formation of a disposable spacer to post dope a gate conductor App 20050145958 - Horak, David V. ; et al.	2005-07-07
Vertical Carbon Nanotube Field Effect Transistor App 20050145838 - Furukawa, Toshiharu ; et al.	2005-07-07
Selective post-doping of gate structures by means of selective oxide growth App 20050148144 - Chou, Anthony I. ; et al.	2005-07-07
Methods and structures for promoting stable synthesis of carbon nanotubes App 20050129948 - Furukawa, Toshiharu ; et al.	2005-06-16
Selective synthesis of semiconducting carbon nanotubes App 20050130341 - Furukawa, Toshiharu ; et al.	2005-06-16
Wrap-around gate field effect transistor App 20050127466 - Furukawa, Toshiharu ; et al.	2005-06-16
Forming gate oxides having multiple thicknesses App 20050118764 - Chou, Anthony I-Chih ; et al.	2005-06-02
Alternating Phase Mask Built By Additive Film Deposition App 20050106472 - Furukawa, Toshiharu ; et al.	2005-05-19
Method of forming fet with T-shaped gate App 20050104139 - Furukawa, Toshiharu ; et al.	2005-05-19
Methods for fabricating a metal-oxide-semiconductor device structure and metal-oxide-semiconductor device structures formed thereby App 20050098804 - Furukawa, Toshiharu ; et al.	2005-05-12
FET with T-shaped gate Grant 6,891,235 - Furukawa , et al. May 10, 2	2005-05-10
SOI device with reduced junction capacitance App 20050087804 - Furukawa, Toshiharu	2005-04-28
Method Of Forming Gas Dielectric With Support Structure App 20050087875 - Furukawa, Toshiharu ; et al.	2005-04-28