loadpatents
Patent applications and USPTO patent grants for Furer; Lev.The latest application filed is for "microelectronic interconnect substrate and packaging techniques".
Patent | Date |
---|---|
Microelectronic Interconnect Substrate And Packaging Techniques App 20120273963 - Mirsky; Uri ;   et al. | 2012-11-01 |
Microelectronic Interconnect Substrate And Packaging Techniques App 20120112238 - Mirsky; Uri ;   et al. | 2012-05-10 |
Interconnect Substrates, Methods And Systems Thereof App 20100252306 - Mirsky; Uri ;   et al. | 2010-10-07 |
Deep Anodization App 20100255274 - Mirsky; Uri ;   et al. | 2010-10-07 |
Optically Monitoring An Alox Fabrication Process App 20100078329 - Mirsky; Uri ;   et al. | 2010-04-01 |
Microelectronic packaging and components App 20070126111 - Mirsky; Uri ;   et al. | 2007-06-07 |
Microelectronic packaging and components App 20060057866 - Mirsky; Uri ;   et al. | 2006-03-16 |
uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.
While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.
All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.