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Patent applications and USPTO patent grants for Fuller; Robert T..The latest application filed is for "cmos integrated circuit architecture incorporating deep implanted emitter region to form auxiliary bipolar transistor".
Patent | Date |
---|---|
CMOS integrated circuit architecture incorporating deep implanted emitter region to form auxiliary bipolar transistor Grant 6,350,640 - Fuller , et al. February 26, 2 | 2002-02-26 |
Radiation hardened dielectric for EEPROM Grant 6,130,172 - Fuller , et al. October 10, 2 | 2000-10-10 |
Self-aligned power field effect transistor in silicon carbide Grant 5,877,041 - Fuller March 2, 1 | 1999-03-02 |
Process for forming a self-aligned raised source/drain MOS device and device therefrom Grant 5,804,846 - Fuller September 8, 1 | 1998-09-08 |
Method for forming complementary patterns in a semiconductor material while using a single masking step Grant 4,956,306 - Fuller , et al. September 11, 1 | 1990-09-11 |
Method of fabricating a twin tub CMOS device Grant 4,707,455 - Tsang , et al. November 17, 1 | 1987-11-17 |
Means for displaying articles in shingled relationship Grant 4,119,207 - Fuller , et al. October 10, 1 | 1978-10-10 |
SEC | 0001509383 | Fuller Robert T |
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