Fross; Bradley K.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Fross; Bradley K..The latest application filed is for "boundary-scan circuit used for analog an ddigital testing of an integrated circuit".

Company Profile

0.9.2

Fross; Bradley K. - Boulder CO
Fross; Bradley K. - Claremont CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Modular and stackable integrated logic analyzer Grant 10,627,444 - Peattie , et al.	2020-04-21
Extracting transaction level information from a circuit interface Grant 10,445,219 - Roy , et al. Oc	2019-10-15
Configurable system and method for debugging a circuit Grant 10,161,999 - Nand , et al. Dec	2018-12-25
System and method for monitoring bus transactions within a programmable integrated circuit by selectively inserting detector circuit at user specified insertion point corresponding to a bus interconnect Grant 9,846,449 - Schumacher , et al. December 19, 2	2017-12-19
Managing programmable device configuration Grant 8,224,638 - Shirazi , et al. July 17, 2	2012-07-17
Co-simulation via boundary scan interface Grant 7,184,946 - Ballagh , et al. February 27, 2	2007-02-27
Boundary-scan circuit used for analog and digital testing of an integrated circuit Grant 7,102,555 - Collins , et al. September 5, 2	2006-09-05
Systems and methods of utilizing virtual input and output modules in a programmable logic device Grant 7,085,706 - McGettigan , et al. August 1, 2	2006-08-01
Boundary-scan Circuit Used For Analog An Ddigital Testing Of An Integrated Circuit App 20050242980 - Collins, Anthony J. ; et al.	2005-11-03
Co-simulation via boundary scan interface App 20040260528 - Ballagh, Jonathan B. ; et al.	2004-12-23
Logic block used as dynamically configurable logic function Grant 6,384,627 - Fross , et al. May 7, 2	2002-05-07

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