Froelich; Daniel S.
Patent Applications and Registrations
Patent applications and USPTO patent grants for Froelich; Daniel S..The latest application filed is for "systems, methods, and devices for high-speed input/output margin testing".
- Froelich; Daniel S. - Portland OR
- Froelich; Daniel S. - Hillsboro OR US
- Froelich, Daniel S. - Beaverton OR
| Patent | Date |
|---|---|
| Systems, Methods, And Devices For High-speed Input/output Margin Testing App 20220163588 - Froelich; Daniel S. ; et al. | 2022-05-26 |
| Cross-talk generation in a multi-lane link during lane testing Grant 11,327,861 - Das Sharma , et al. May 10, 2 | 2022-05-10 |
| Adjustable retimer buffer Grant 11,288,154 - Sharma , et al. March 29, 2 | 2022-03-29 |
| Margin Test Data Tagging And Predictive Expected Margins App 20220091185 - Strickling; Sam J. ; et al. | 2022-03-24 |
| Multiplexer-enabled Cables And Test Fixtures App 20220034967 - Strickling; Sam J. ; et al. | 2022-02-03 |
| Cable Condition Indicator App 20220034975 - Strickling; Sam J. ; et al. | 2022-02-03 |
| Systems, Methods And Devices For High-speed Input/output Margin Testing App 20210405108 - Strickling; Sam J. ; et al. | 2021-12-30 |
| Test And Measurement System For Analyzing Devices Under Test App 20210406144 - Strickling; Sam J. ; et al. | 2021-12-30 |
| In-band margin probing on an operational interconnect Grant 11,157,350 - Froelich , et al. October 26, 2 | 2021-10-26 |
| Automated Recognition Of A Device Under Test App 20210297882 - Strickling; Sam J. ; et al. | 2021-09-23 |
| Adjustable Retimer Buffer App 20210089421 - Sharma; Debendra Das ; et al. | 2021-03-25 |
| Cross-talk Generation In A Multi-lane Link During Lane Testing App 20210081288 - Das Sharma; Debendra ; et al. | 2021-03-18 |
| Adjustable retimer buffer Grant 10,860,449 - Sharma , et al. December 8, 2 | 2020-12-08 |
| Cross-talk generation in a multi-lane link during lane testing Grant 10,853,212 - Das Sharma , et al. December 1, 2 | 2020-12-01 |
| In-band Margin Probing On An Operational Interconnect App 20200364108 - Froelich; Daniel S. ; et al. | 2020-11-19 |
| Systems, Methods And Devices For High-speed Input/output Margin Testing App 20200249275 - Kind Code | 2020-08-06 |
| Systems, Methods And Devices For High-speed Input/output Margin Testing App 20200250368 - Kind Code | 2020-08-06 |
| In-band margin probing on an operational interconnect Grant 10,671,476 - Froelich , et al. | 2020-06-02 |
| Interconnect Retimer Enhancements App 20200132760 - Froelich; Daniel S. ; et al. | 2020-04-30 |
| Interconnect retimer enhancements Grant 10,534,034 - Froelich , et al. Ja | 2020-01-14 |
| Cross-talk Generation In A Multi-lane Link During Lane Testing App 20190042380 - Das Sharma; Debendra ; et al. | 2019-02-07 |
| System, Method, And Apparatus For Sris Mode Selection For Pcie App 20190041898 - Harriman; David J. ; et al. | 2019-02-07 |
| Adjustable Retimer Buffer App 20180285227 - Sharma; Debendra Das ; et al. | 2018-10-04 |
| In-band Margin Probing On An Operational Interconnect App 20180267850 - Froelich; Daniel S. ; et al. | 2018-09-20 |
| Standardized Retimer App 20170351640 - Nilange; Manisha ; et al. | 2017-12-07 |
| Physical interface for a serial interconnect Grant 9,779,053 - Das Sharma , et al. October 3, 2 | 2017-10-03 |
| Method, apparatus and system for measuring latency in a physical unit of a circuit Grant 9,558,145 - Harriman , et al. January 31, 2 | 2017-01-31 |
| Test logic for a serial interconnect Grant 9,552,269 - Das Sharma , et al. January 24, 2 | 2017-01-24 |
| Interconnect Retimer Enhancements App 20160377679 - Froelich; Daniel S. ; et al. | 2016-12-29 |
| Physical Interface For A Serial Interconnect App 20160179710 - Das Sharma; Debendra ; et al. | 2016-06-23 |
| Test Logic For A Serial Interconnect App 20160179647 - Das Sharma; Debendra ; et al. | 2016-06-23 |
| Method, Apparatus And System For Measuring Latency In A Physical Unit Of A Circuit App 20160124894 - Harriman; David J. ; et al. | 2016-05-05 |
| Method, apparatus and system for measuring latency in a physical unit of a circuit Grant 9,262,347 - Harriman , et al. February 16, 2 | 2016-02-16 |
| Method, Apparatus And System For Measuring Latency In A Physical Unit Of A Circuit App 20150117504 - Harriman; David J. ; et al. | 2015-04-30 |
| Incorporating an independent logic block in a system-on-a-chip Grant 8,395,416 - Harriman , et al. March 12, 2 | 2013-03-12 |
| Incorporating An Independent Logic Block In A System-on-a-chip App 20120068735 - HARRIMAN; DAVID J. ; et al. | 2012-03-22 |
| Scheduling of host-initiated transactions App 20040193715 - Froelich, Daniel S. ; et al. | 2004-09-30 |
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