| Patent | Date |
|---|
Method for manufacturing a silicon carbide wafer using a susceptor having draining openings
Grant 10,153,207 - Frisina , et al. Dec | 2018-12-11 |
Process for manufacturing a semiconductor power device comprising charge-balance column structures and respective device
Grant 9,911,810 - Lorenti , et al. March 6, 2 | 2018-03-06 |
Process For Manufacturing A Semiconductor Power Device Comprising Charge-balance Column Structures And Respective Device
App 20170141191 - Lorenti; Simona ; et al. | 2017-05-18 |
Process for manufacturing a semiconductor power device comprising charge-balance column structures and respective device
Grant 9,607,859 - Lorenti , et al. March 28, 2 | 2017-03-28 |
Method For Manufacturing A Silicon Carbide Wafer And Respective Equipment
App 20160307800 - Frisina; Ferruccio ; et al. | 2016-10-20 |
Reaction chamber including a susceptor having draining openings for manufacturing a silicon carbide wafer
Grant 9,406,504 - Frisina , et al. August 2, 2 | 2016-08-02 |
Process For Manufacturing A Semiconductor Power Device Comprising Charge-balance Column Structures And Respective Device
App 20150325640 - LORENTI; SIMONA ; et al. | 2015-11-12 |
Integrated electronic device with edge-termination structure and manufacturing method thereof
Grant 9,142,646 - Frisina , et al. September 22, 2 | 2015-09-22 |
Process for manufacturing a semiconductor power device comprising charge-balance column structures and respective device
Grant 9,099,322 - Lorenti , et al. August 4, 2 | 2015-08-04 |
Integrated Electronic Device With Edge-termination Structure And Manufacturing Method Thereof
App 20150187912 - FRISINA; FERRUCCIO ; et al. | 2015-07-02 |
Integrated electronic device with edge-termination structure and manufacturing method thereof
Grant 9,018,635 - Frisina , et al. April 28, 2 | 2015-04-28 |
Vertical-conduction integrated electronic device and method for manufacturing thereof
Grant 8,921,211 - Frisina , et al. December 30, 2 | 2014-12-30 |
Vertical-conduction integrated electronic device and method for manufacturing thereof
Grant 08921211 - | 2014-12-30 |
Vertical conduction power electronic device and corresponding realization method
Grant 8,895,370 - Frisina , et al. November 25, 2 | 2014-11-25 |
Process for manufacturing a power semiconductor device having charge-balance columnar structures on a non-planar surface, and corresponding power semiconductor device
Grant 8,866,223 - Guarnera , et al. October 21, 2 | 2014-10-21 |
Process for manufacturing a power semiconductor device having charge-balance columnar structures on a non-planar surface, and corresponding power semiconductor device
Grant 8,853,779 - Guarnera , et al. October 7, 2 | 2014-10-07 |
Vertical-conduction Integrated Electronic Device And Method For Manufacturing Thereof
App 20140141603 - FRISINA; Ferruccio ; et al. | 2014-05-22 |
Vertical-conduction integrated electronic device and method for manufacturing thereof
Grant 8,653,590 - Frisina , et al. February 18, 2 | 2014-02-18 |
Vertical Conduction Power Electronic Device And Corresponding Realization Method
App 20140045309 - FRISINA; FERRUCCIO ; et al. | 2014-02-13 |
Vertical conduction power electronic device and corresponding realization method
Grant 8,624,332 - Frisina , et al. January 7, 2 | 2014-01-07 |
Manufacturing process of a power electronic device integrated in a semiconductor substrate with wide band gap and electronic device thus obtained
Grant 8,580,640 - Saggio , et al. November 12, 2 | 2013-11-12 |
Power MOS electronic device and corresponding realizing method
Grant 8,482,085 - Magri , et al. July 9, 2 | 2013-07-09 |
Method For Manufacturing A Silicon Carbide Wafer And Respective Equipment
App 20130157448 - Frisina; Ferruccio ; et al. | 2013-06-20 |
Process for manufacturing a power semiconductor device having charge-balance columnar structures on a non-planar surface, and corresponding power semiconductor device
Grant 8,455,318 - Guarnera , et al. June 4, 2 | 2013-06-04 |
Manufacturing Process Of A Power Electronic Device Integrated In A Semiconductor Substrate With Wide Band Gap And Electronic Device Thus Obtained
App 20130095624 - SAGGIO; Mario Giuseppe ; et al. | 2013-04-18 |
Power MOS electronic device and corresponding realizing method
Grant 8,420,487 - Magri , et al. April 16, 2 | 2013-04-16 |
Manufacturing process of a power electronic device integrated in a semiconductor substrate with wide band gap and electronic device thus obtained
Grant 8,344,449 - Saggio , et al. January 1, 2 | 2013-01-01 |
Process For Manufacturing A Semiconductor Power Device Comprising Charge-balance Column Structures And Respective Device
App 20120319191 - Lorenti; Simona ; et al. | 2012-12-20 |
Process for manufacturing a semiconductor power device comprising charge-balance column structures and respective device
Grant 8,304,311 - Lorenti , et al. November 6, 2 | 2012-11-06 |
Process For Manufacturing A Power Semiconductor Device Having Charge-balance Columnar Structures On A Non-planar Surface, And Corresponding Power Semiconductor Device
App 20120187479 - Guarnera; Alfio ; et al. | 2012-07-26 |
Process For Manufacturing A Power Semiconductor Device Having Charge-balance Columnar Structures On A Non-planar Surface, And Corresponding Power Semiconductor Device
App 20120187480 - Guarnera; Alfio ; et al. | 2012-07-26 |
Method for manufacturing electronic devices integrated in a semiconductor substrate and corresponding devices
Grant 8,174,076 - Frisina , et al. May 8, 2 | 2012-05-08 |
Integrated Electronic Device With Edge-termination Structure And Manufacturing Method Thereof
App 20120056200 - FRISINA; Ferruccio ; et al. | 2012-03-08 |
Vertical-conduction Integrated Electronic Device And Method For Manufacturing Thereof
App 20120049940 - FRISINA; Ferruccio ; et al. | 2012-03-01 |
Process for manufacturing a charge-balance power diode and an edge-termination structure for a charge-balance semiconductor power device
Grant 8,039,898 - Saggio , et al. October 18, 2 | 2011-10-18 |
Process for manufacturing a multi-drain electronic power device integrated in semiconductor substrate and corresponding device
Grant 8,012,832 - Saggio , et al. September 6, 2 | 2011-09-06 |
Power Mos Electronic Device And Corresponding Realizing Method
App 20110089491 - Magri; Angelo ; et al. | 2011-04-21 |
Method For Manufacturing Electronic Devices Integrated In A Semiconductor Substrate And Corresponding Devices
App 20110079794 - Frisina; Ferruccio ; et al. | 2011-04-07 |
Power Mos Electronic Device And Corresponding Realizing Method
App 20110081759 - Magri; Angelo ; et al. | 2011-04-07 |
Power field effect transistor and manufacturing method thereof
Grant 7,892,923 - Saggio , et al. February 22, 2 | 2011-02-22 |
Process For Manufacturing A Multi-drain Electronic Power Device Integrated In Semiconductor Substrate And Corresponding Device
App 20110034010 - Saggio; Mario Giuseppe ; et al. | 2011-02-10 |
Power MOS electronic device and corresponding realizing method
Grant 7,875,936 - Magri , et al. January 25, 2 | 2011-01-25 |
Method for manufacturing electronic devices integrated in a semiconductor substrate and corresponding devices
Grant 7,871,880 - Frisina , et al. January 18, 2 | 2011-01-18 |
Process for manufacturing a multi-drain electronic power device integrated in semiconductor substrate and corresponding device
Grant 7,838,927 - Saggio , et al. November 23, 2 | 2010-11-23 |
Process for manufacturing a charge-balance power diode and an edge-termination structure for a charge-balance semiconductor power device
Grant 7,790,520 - Saggio , et al. September 7, 2 | 2010-09-07 |
Power electronic device of multi-drain type integrated on a semiconductor substrate and relative manufacturing process
Grant 7,754,566 - Saggio , et al. July 13, 2 | 2010-07-13 |
Manufacturing Process Of A Power Electronic Device Integrated In A Semiconductor Substrate With Wide Band Gap And Electronic Device Thus Obtained
App 20100163888 - SAGGIO; Mario Giuseppe ; et al. | 2010-07-01 |
Process For Manufacturing A Charge-balance Power Diode And An Edge-termination Structure For A Charge-balance Semiconductor Power Device
App 20100093136 - Saggio; Mario Giuseppe ; et al. | 2010-04-15 |
Switching-controlled power MOS electronic device
Grant 7,569,883 - Frisina , et al. August 4, 2 | 2009-08-04 |
Process For Manufacturing A Power Semiconductor Device Having Charge-balance Columnar Structures On A Non-planar Surface, And Corresponding Power Semiconductor Device
App 20090179263 - Guarnera; Alfio ; et al. | 2009-07-16 |
Insulated gate planar integrated power device with co-integrated Schottky diode and process
Grant 7,560,368 - Magri' , et al. July 14, 2 | 2009-07-14 |
Power Electronic Device Of Multi-drain Type Integrated On A Semiconductor Substrate And Relative Manufacturing Process
App 20090176341 - Saggio; Mario G. ; et al. | 2009-07-09 |
Process For Manufacturing A Semiconductor Power Device Comprising Charge-balance Column Structures And Respective Device
App 20090159969 - Lorenti; Simona ; et al. | 2009-06-25 |
Power electronic device of multi-drain type integrated on a semiconductor substrate and relative manufacturing process
Grant 7,498,619 - Saggio , et al. March 3, 2 | 2009-03-03 |
Process For Manufacturing A Multi-drain Electronic Power Device Integrated In Semiconductor Substrate And Corresponding Device
App 20090001460 - Saggio; Mario Giuseppe ; et al. | 2009-01-01 |
Process For Manufacturing A Multi-drain Electronic Power Device Integrated In Semiconductor Substrate And Corresponding Device
App 20080224204 - Saggio; Mario Giuseppe ; et al. | 2008-09-18 |
Method For Manufacturing Electronic Devices Integrated In A Semiconductor Substrate And Corresponding Devices
App 20080185594 - Frisina; Ferruccio ; et al. | 2008-08-07 |
Power Field Effect Transistor And Manufacturing Method Thereof
App 20080185593 - Saggio; Mario Giuseppe ; et al. | 2008-08-07 |
Process for manufacturing a charge-balance power diode and an edge-termination structure for a charge-balance semiconductor power device
App 20080001223 - Saggio; Mario Giuseppe ; et al. | 2008-01-03 |
Vertical-conduction and planar-structure MOS device with a double thickness of gate oxide and method for realizing power vertical MOS transistors with improved static and dynamic performance and high scaling down density
Grant 7,304,335 - Magri' , et al. December 4, 2 | 2007-12-04 |
Insulated gate planar integrated power device with co-integrated Schottky diode and process
App 20070102725 - Magri'; Angelo ; et al. | 2007-05-10 |
Power MOS electronic device and corresponding realizing method
App 20060244059 - Magri; Angelo ; et al. | 2006-11-02 |
Method for enhancing the electric connection between a power electronic device and its package
Grant 7,126,173 - Frisina , et al. October 24, 2 | 2006-10-24 |
Switching-controlled power MOS electronic device
App 20060220121 - Frisina; Ferruccio ; et al. | 2006-10-05 |
Power electronic device of multi-drain type integrated on a semiconductor substrate and relative manufacturing process
App 20060194391 - Saggio; Mario G. ; et al. | 2006-08-31 |
Vertical-conduction And Planar-structure Mos Device With A Double Thickness Of Gate Oxide And Method For Realizing Power Vertical Mos Transistors With Improved Static And Dynamic Performance And High Scaling Down Density
App 20060186434 - MAGRI'; Angelo ; et al. | 2006-08-24 |
MOS power device with high integration density and manufacturing process thereof
Grant 7,091,558 - Frisina , et al. August 15, 2 | 2006-08-15 |
High voltage MOS-gated power device and related manufacturing process
Grant 7,084,034 - Frisina August 1, 2 | 2006-08-01 |
Integrated device with Schottky diode and MOS transistor and related manufacturing process
Grant 7,071,062 - Saggio , et al. July 4, 2 | 2006-07-04 |
Vertical-conduction and planar-structure MOS device with a double thickness of gate oxide and method for realizing power vertical MOS transistors with improved static and dynamic performances and high scaling down density
Grant 7,067,363 - Magri' , et al. June 27, 2 | 2006-06-27 |
Vertical conduction power electronic device and corresponding realization method
App 20060071242 - Frisina; Ferruccio ; et al. | 2006-04-06 |
High-gain photodetector with separated PN junction and rare earth doped region and a method of forming the same
Grant 6,943,390 - Coffa , et al. September 13, 2 | 2005-09-13 |
Vertical-conduction and planar-structure MOS device with a double thickness of gate oxide and method for realizing power vertical MOS transistors with improved static and dynamic performances and high scaling down density
App 20050139906 - Magri', Angelo ; et al. | 2005-06-30 |
Integrated device with Schottky diode and MOS transistor and related manufacturing process
App 20050118766 - Saggio, Mario ; et al. | 2005-06-02 |
Integrated device with Schottky diode and MOS transistor and related manufacturing process
Grant 6,841,836 - Saggio , et al. January 11, 2 | 2005-01-11 |
Semiconductor device for electro-optic applications, method for manufacturing said device and corresponding semiconductor laser device
Grant 6,828,598 - Coffa , et al. December 7, 2 | 2004-12-07 |
MOS power device with high integration density and manufacturing process thereof
App 20040222483 - Frisina, Ferruccio ; et al. | 2004-11-11 |
Method of manufacturing an integrated edge structure for high voltage semiconductor devices, and related integrated edge structure
Grant 6,809,383 - Frisina October 26, 2 | 2004-10-26 |
Insulated gate planar integrated power device with co-integrated schottky diode and process
App 20040164304 - Magri, Angelo ; et al. | 2004-08-26 |
Integrated device with Schottky diode and MOS transistor and related manufacturing process
App 20040140512 - Saggio, Mario ; et al. | 2004-07-22 |
Gate insulating structure for power devices, and related manufacturing process
Grant 6,756,259 - Frisina , et al. June 29, 2 | 2004-06-29 |
High voltage mos-gated power device and related manufacturing process
App 20030201503 - Frisina, Ferruccio | 2003-10-30 |
High voltage MOS-gated power device
Grant 6,586,798 - Frisina July 1, 2 | 2003-07-01 |
Method for enhancing the electric connection between a power electronic device and its package
App 20030100154 - Frisina, Ferruccio ; et al. | 2003-05-29 |
High-gain photodetector of semiconductor material and manufacturing process thereof
App 20020185700 - Coffa, Salvatore ; et al. | 2002-12-12 |
High integration density MOS technology power device structure
Grant 6,492,691 - Magri' , et al. December 10, 2 | 2002-12-10 |
MOS technology power device with low output resistance and low capacity, and related manufacturing process
App 20020123195 - Frisina, Ferruccio ; et al. | 2002-09-05 |
High Integration Density Mos Technology Power Device Structure
App 20020113276 - MAGRI', ANGELO ; et al. | 2002-08-22 |
Silicon improved schottky barrier diode
App 20020105007 - Saggio, Mario ; et al. | 2002-08-08 |
Gate insulating structure for power devices, and related manufacturing process
App 20020100936 - Frisina, Ferruccio ; et al. | 2002-08-01 |
MOS technology power device
Grant 6,404,010 - Saggio , et al. June 11, 2 | 2002-06-11 |
Fabrication of VDMOS structure with reduced parasitic effects
Grant 6,391,723 - Frisina May 21, 2 | 2002-05-21 |
MOS technology power device
App 20020014671 - Saggio, Mario ; et al. | 2002-02-07 |
Method of manufacturing an integrated edge structure for high voltage semiconductor devices, and related integrated edge structure
App 20010053589 - Frisina, Ferruccio | 2001-12-20 |
Method of manufacturing an integrated edge structure for high voltage semiconductor devices, and related integrated edge structure
Grant 6,300,171 - Frisina October 9, 2 | 2001-10-09 |
Single Feature Size Mos Technology Power Device
App 20010012663 - MAGRI', ANGELO ; et al. | 2001-08-09 |
Single Feature Size Mos Technology Power Device
App 20010011722 - FRISINA, FERRUCCIO ; et al. | 2001-08-09 |
High Density Mos Technology Power Device
App 20010012654 - MAGRI', ANGELO ; et al. | 2001-08-09 |
Fabrication of insulated gate bipolar devices
Grant 6,271,061 - Frisina , et al. August 7, 2 | 2001-08-07 |
Asymmetric MOS technology power device
App 20010001213 - Magri', Angelo ; et al. | 2001-05-17 |
MOS technology power device with low output resistance and low capacitance, and related manufacturing process
Grant 6,228,719 - Frisina , et al. May 8, 2 | 2001-05-08 |
Zero thermal budget manufacturing process for MOS-technology power devices
Grant 6,140,679 - Ferla , et al. October 31, 2 | 2000-10-31 |
Process for integrating, in a single semiconductor chip, MOS technology devices with different threshold voltages
Grant 6,040,609 - Frisina , et al. March 21, 2 | 2000-03-21 |
Integrated high-voltage bipolar power transistor and low voltage MOS power transistor structure in the emitter switching configuration and relative manufacturing process
Grant RE36,311 - Frisina , et al. September 21, 1 | 1999-09-21 |
Zero thermal budget manufacturing process for MOS-technology power devices
Grant 5,933,733 - Ferla , et al. August 3, 1 | 1999-08-03 |
MOS integrated device comprising a gate protection diode
Grant 5,886,381 - Frisina March 23, 1 | 1999-03-23 |
MOS-technology power device and process of making same
Grant 5,874,338 - Ferla , et al. February 23, 1 | 1999-02-23 |
Process for manufacturing a MOS-technology power device chip and package assembly
Grant 5,851,855 - Ferla , et al. December 22, 1 | 1998-12-22 |
MOS-technology power device integrated structure
Grant 5,841,167 - Grimaldi , et al. November 24, 1 | 1998-11-24 |
Process of making a MOS-technology power device
Grant 5,817,546 - Ferla , et al. October 6, 1 | 1998-10-06 |
Process for manufacturing high-density MOS-technology power devices
Grant 5,670,392 - Ferla , et al. September 23, 1 | 1997-09-23 |
MOS-technology power device chip and package assembly
Grant 5,631,476 - Ferla , et al. May 20, 1 | 1997-05-20 |
Power device integrated structure with low saturation voltage
Grant 5,631,483 - Ferla , et al. May 20, 1 | 1997-05-20 |
Integrated structure pad assembly for lead bonding
Grant 5,592,026 - Frisina , et al. January 7, 1 | 1997-01-07 |
Process for manufacturing an integrated bipolar power device and a fast diode
Grant 5,468,660 - Frisina , et al. November 21, 1 | 1995-11-21 |
Process of introduction and diffusion of platinum ions in a slice of silicon
Grant 5,227,315 - Frisina , et al. July 13, 1 | 1993-07-13 |
Integrated high-voltage bipolar power transistor and low voltage MOS power transistor structure in the emitter switching configuration and relative manufacturing process
Grant 5,118,635 - Frisina , et al. June 2, 1 | 1992-06-02 |
Integrated high-voltage bipolar power transistor and low voltage MOS power transistor structure in the emitter switching configuration and relative manufacturing process
Grant 5,065,213 - Frisina , et al. November 12, 1 | 1991-11-12 |
MOS power structure with protective device against overvoltages and manufacturing process therefor
Grant 4,916,085 - Frisina April 10, 1 | 1990-04-10 |
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