Fried; David M.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Fried; David M..The latest application filed is for "system and method for performing process model calibration in a virtual semiconductor device fabrication environment".

Company Profile

9.65.64

Fried; David M. - South Salem NY
Fried; David M. - Monte Sereno CA
Fried; David M. - Brewster NY
Fried; David M. - Hopewell Junction NY
FRIED; DAVID M - Brewster NY
Fried; David M. - Ithaca NY
Fried; David M. - Williston VT
Fried; David M. - Willston VT
Fried, David M. - Essex Junction VT

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
System And Method For Performing Process Model Calibration In A Virtual Semiconductor Device Fabrication Environment App 20220019724 - Egan; William ; et al.	2022-01-20
System And Method For Predictive 3-d Virtual Fabrication App 20210319162 - Greiner; Kenneth B. ; et al.	2021-10-14
System and method for key parameter identification, process model calibration and variability analysis in a virtual semiconductor device fabrication environment Grant 11,144,701 - Egan , et al. October 12, 2	2021-10-12
System and method for predictive 3-D virtual fabrication Grant 11,074,388 - Greiner , et al. July 27, 2	2021-07-27
System and method for performing a multi-etch process using material-specific behavioral parameters in a 3-D virtual fabrication environment Grant 11,048,847 - Greiner , et al. June 29, 2	2021-06-29
Resist And Etch Modeling App 20210157228 - Sriraman; Saravanapriyan ; et al.	2021-05-27
Fill process optimization using feature scale modeling Grant 10,977,405 - Bowes , et al. April 13, 2	2021-04-13
System and method for determining dimensional range of repairable defects by deposition and etching in a virtual fabrication environment Grant 10,885,253 - Sobieski , et al. January 5, 2	2021-01-05
System And Method For Process Window Optimization In A Virtual Semiconductor Device Fabrication Environment App 20200356711 - Egan; William J. ; et al.	2020-11-12
System and method for electrical behavior modeling in a 3D virtual fabrication environment Grant 10,762,267 - Kamon , et al. Sep	2020-09-01
Fill Process Optimization Using Feature Scale Modeling App 20200242209 - Bowes; Michael ; et al.	2020-07-30
System And Method For Determining Dimensional Range Of Repairable Defects By Deposition And Etching In A Virtual Fabrication Env App 20200134117 - Sobieski; Daniel ; et al.	2020-04-30
System And Method For Predictive 3-d Virtual Fabrication App 20190286780 - Greiner; Kenneth B. ; et al.	2019-09-19
System And Method For Performing A Multi-etch Process Using Material-specific Behavioral Parameters In A 3-d Virtual Fabrication App 20190266306 - Greiner; Kenneth B. ; et al.	2019-08-29
Predictive 3-D virtual fabrication system and method Grant 10,242,142 - Greiner , et al.	2019-03-26
System And Method For Key Parameter Identification, Process Model Calibration And Variability Analysis In A Virtual Semiconductor Device Fabrication Environment App 20180365370 - Egan; William J. ; et al.	2018-12-20
System and method for performing directed self-assembly in a 3-D virtual fabrication environment Grant 9,965,577 - Kamon , et al. May 8, 2	2018-05-08
System And Method For Electrical Behavior Modeling In A 3d Virtual Fabrication Environment App 20170344683 - Kamon; Mattan ; et al.	2017-11-30
Modeling pattern dependent effects for a 3-D virtual semiconductor fabrication environment Grant 9,659,126 - Greiner , et al. May 23, 2	2017-05-23
System And Method For Performing Directed Self-assembly In A 3-d Virtual Fabrication Environment App 20160217233 - Kamon; Mattan ; et al.	2016-07-28
System and method for modeling epitaxial growth in a 3-D virtual fabrication environment Grant 9,317,632 - Faken , et al. April 19, 2	2016-04-19
Modeling Pattern Dependent Effects For A 3-d Virtual Semiconductor Fabrication Environment App 20150213176 - GREINER; Kenneth B. ; et al.	2015-07-30
High density memory cells using lateral epitaxy Grant 9,087,928 - Booth , et al. July 21, 2	2015-07-21
Multi-etch process using material-specific behavioral parameters in 3-D virtual fabrication environment Grant 8,959,464 - Greiner , et al. February 17, 2	2015-02-17
System And Method For Modeling Epitaxial Growth In A 3-d Virtual Fabrication Environment App 20140278266 - FAKEN; Daniel ; et al.	2014-09-18
Design Rule Checks In 3-d Virtual Fabrication Environment App 20140282328 - FRIED; David M. ; et al.	2014-09-18
Multi-etch process using material-specific behavioral parameters in 3-D virtual fabrication environment App 20140282302 - GREINER; Kenneth B. ; et al.	2014-09-18
Predictive 3-d Virtual Fabrication System And Method App 20140282324 - GREINER; Kenneth B. ; et al.	2014-09-18
Rule checks in 3-D virtual fabrication environment Grant 8,832,620 - Fried , et al. September 9, 2	2014-09-09
High density memory cells using lateral epitaxy Grant 8,829,585 - Booth, Jr. , et al. September 9, 2	2014-09-09
FET structures with trench implantation to improve back channel leakage and body resistance Grant 8,809,953 - Fried , et al. August 19, 2	2014-08-19
Post silicide testing for replacement high-k metal gate technologies Grant 8,610,451 - Ahsan , et al. December 17, 2	2013-12-17
Semiconductor structure having varactor with parallel DC path adjacent thereto Grant 8,598,683 - Fried , et al. December 3, 2	2013-12-03
High Density Memory Cells Using Lateral Epitaxy App 20130183806 - Booth; Roger A. ; et al.	2013-07-18
High Density Memory Cells Using Lateral Epitaxy App 20120305998 - Booth, JR.; Roger A. ; et al.	2012-12-06
Semiconductor Structure Having Varactor With Parallel Dc Path Adjacent Thereto App 20120205781 - Fried; David M. ; et al.	2012-08-16
FET structures with trench implantation to improve back channel leakage and body resistance Grant 8,236,632 - Fried , et al. August 7, 2	2012-08-07
Semiconductor structure having varactor with parallel DC path adjacent thereto Grant 8,232,624 - Fried , et al. July 31, 2	2012-07-31
Fet Structures With Trench Implantation To Improve Back Channel Leakage And Body Resistance App 20120187490 - Fried; David M. ; et al.	2012-07-26
Post Silicide Testing For Replacement High-k Metal Gate Technologies App 20120119778 - Ahsan; Ishtiaq ; et al.	2012-05-17
Fet Structures With Trench Implantation To Improve Back Channel Leakage And Body Resistance App 20120086077 - FRIED; DAVID M ; et al.	2012-04-12
Method of reducing stacking faults through annealing Grant 7,956,417 - Wang , et al. June 7, 2	2011-06-07
Semiconductor Structure Having Varactor With Parallel Dc Path Adjacent Thereto App 20110062555 - Fried; David M. ; et al.	2011-03-17
Area-efficient gated diode structure and method of forming same Grant 7,884,411 - Chang , et al. February 8, 2	2011-02-08
Method and structure for self-aligned device contacts Grant 7,884,396 - Costrini , et al. February 8, 2	2011-02-08
Method and structure for self-aligned device contacts Grant 7,875,550 - Costrini , et al. January 25, 2	2011-01-25
Semiconductor structure and system for fabricating an integrated circuit chip Grant 7,872,310 - Abadeer , et al. January 18, 2	2011-01-18
Method Of Reducing Stacking Faults Through Annealing App 20100283089 - Wang; Yun-Yu ; et al.	2010-11-11
Decoder for a stationary switch machine Grant 7,820,501 - Wang , et al. October 26, 2	2010-10-26
Double gated transistor and method of fabrication Grant 7,645,650 - Bryant , et al. January 12, 2	2010-01-12
Thin Silicon Single Diffusion Field Effect Transistor For Enhanced Drive Performance With Stress Film Liners App 20090305471 - Chang; Leland ; et al.	2009-12-10
Semiconductor Structure And System For Fabricating An Integrated Circuit Chip App 20090134463 - Abadeer; Wagdi W. ; et al.	2009-05-28
Integrated circuit having pairs of parallel complementary FinFETs Grant 7,517,806 - Bryant , et al. April 14, 2	2009-04-14
Dual Stress Liner Structure Having Substantially Planar Interface Between Liners And Related Method App 20090090974 - Costrini; Gregory ; et al.	2009-04-09
Concurrent fin-fet and thick body device fabrication Grant 7,473,970 - Abadeer , et al. January 6, 2	2009-01-06
Semiconductor structure with self-aligned device contacts Grant 7,470,615 - Costrini , et al. December 30, 2	2008-12-30
Method And Sturcture For Self-aligned Device Contacts App 20080308936 - Costrini; Gregory ; et al.	2008-12-18
Method and Structure for Self-Aligned Device Contacts App 20080233743 - Costrini; Gregory ; et al.	2008-09-25
Area-Efficient Gated Diode Structure and Method of Forming Same App 20080164507 - Chang; Leland ; et al.	2008-07-10
Area-efficient gated diode structure and method of forming same Grant 7,385,251 - Chang , et al. June 10, 2	2008-06-10
Method Of Reducing Stacking Faults Through Annealing App 20080087961 - Wang; Yun-Yu ; et al.	2008-04-17
Method And Structure For Self-aligned Device Contacts App 20080026513 - Costrini; Gregory ; et al.	2008-01-31
Double Gated Transistor And Method Of Fabrication App 20070254438 - Bryant; Andres ; et al.	2007-11-01
Double gated transistor and method of fabrication Grant 7,288,445 - Bryant , et al. October 30, 2	2007-10-30
Area-efficient gated diode structure and method of forming same App 20070164359 - Chang; Leland ; et al.	2007-07-19
Thin silicon single diffusion field effect transistor for enhanced drive performance with stress film liners App 20070158743 - Chang; Leland ; et al.	2007-07-12
Concurrent Fin-FET and thick-body device fabrication Grant 7,163,851 - Abadeer , et al. January 16, 2	2007-01-16
Concurrent fin-fet and thick body device fabrication App 20060249799 - Abadeer; Wagdi W. ; et al.	2006-11-09
Dual double gate transistor and method for forming Grant 7,101,741 - Fried , et al. September 5, 2	2006-09-05
FinFET SRAM cell using low mobility plane for cell stability and method for forming Grant 7,087,477 - Fried , et al. August 8, 2	2006-08-08
Methods of forming structure and spacer and related finfet App 20060154423 - Fried; David M. ; et al.	2006-07-13
Implanted asymmetric doped polysilicon gate FinFET Grant 7,064,019 - Fried , et al. June 20, 2	2006-06-20
Fin-type resistors Grant 7,064,413 - Fried , et al. June 20, 2	2006-06-20
Formation of capacitor having a Fin structure Grant 7,060,553 - Fried , et al. June 13, 2	2006-06-13
FinFET CMOS with NVRAM capability Grant 7,052,958 - Fried , et al. May 30, 2	2006-05-30
Formation of capacitor having a Fin structure App 20060038216 - Fried; David M. ; et al.	2006-02-23
Integrated circuit with capacitors having a fin structure Grant 6,995,412 - Fried , et al. February 7, 2	2006-02-07
Integrated circuit having pairs of parallel complementary finfets App 20050272195 - Bryant, Andres ; et al.	2005-12-08
Finfet SRAM cell using low mobility plane for cell stability and method for forming Grant 6,967,351 - Fried , et al. November 22, 2	2005-11-22
Double gated vertical transistor with different first and second gate materials Grant 6,960,806 - Bryant , et al. November 1, 2	2005-11-01
Double gated transistor and method of fabrication App 20050221543 - Bryant, Andres ; et al.	2005-10-06
Integrated circuit having pairs of parallel complementary FinFETs Grant 6,943,405 - Bryant , et al. September 13, 2	2005-09-13
Method and system for including parametric in-line test data in simulations for improved model to hardware correlation Grant 6,934,671 - Bertsch , et al. August 23, 2	2005-08-23
FinFET SRAM cell using low mobility plane for cell stability and method for forming App 20050121676 - Fried, David M. ; et al.	2005-06-09
DRAM cell with enhanced SER immunity Grant 6,888,187 - Brown , et al. May 3, 2	2005-05-03
DRAM cell with enhanced SER immunity Grant 6,864,136 - Brown , et al. March 8, 2	2005-03-08
Strained Fin FETs structure and method Grant 6,849,884 - Clark , et al. February 1, 2	2005-02-01
Integrated Circuit Having Pairs Of Parallel Complementary Finfets App 20050001273 - Bryant, Andres ; et al.	2005-01-06
Implanted asymmetric doped polysilicon gate FinFet App 20040222466 - Fried, David M. ; et al.	2004-11-11
Method for fabricating multiple-plane FinFET CMOS Grant 6,815,277 - Fried , et al. November 9, 2	2004-11-09
Self-aligned dog-bone structure for FinFET applications and methods to fabricate the same Grant 6,812,075 - Fried , et al. November 2, 2	2004-11-02
Implanted asymmetric doped polysilicon gate FinFET Grant 6,800,905 - Fried , et al. October 5, 2	2004-10-05
Dual double gate transistor and method for forming App 20040161898 - Fried, David M. ; et al.	2004-08-19
Fin-type resistors App 20040159910 - Fried, David M. ; et al.	2004-08-19
Strained fin FETs structure and method Grant 6,767,793 - Clark , et al. July 27, 2	2004-07-27
DRAM cell with enhanced SER immunity App 20040126969 - Brown, Jeffrey S. ; et al.	2004-07-01
Dual double gate transistor Grant 6,750,487 - Fried , et al. June 15, 2	2004-06-15
Fin-type resistors Grant 6,720,231 - Fried , et al. April 13, 2	2004-04-13
Concurrent Fin-FET and thick-body device fabrication App 20040036118 - Abadeer, Wagdi W. ; et al.	2004-02-26
DRAM cell with enhanced SER immunity App 20040036095 - Brown, Jeffrey S. ; et al.	2004-02-26
Multiple-plane FinFET CMOS App 20040038464 - Fried, David M. ; et al.	2004-02-26
Self-aligned dog-bone structure for FinFET applications and methods to fabricate the same App 20040007738 - Fried, David M. ; et al.	2004-01-15
Fin memory cell and method of fabrication Grant 6,664,582 - Fried , et al. December 16, 2	2003-12-16
FinFET layout generation Grant 6,662,350 - Fried , et al. December 9, 2	2003-12-09
FinFET CMOS with NVRAM capability Grant 6,657,252 - Fried , et al. December 2, 2	2003-12-02
Multiple-plane FinFET CMOS Grant 6,657,259 - Fried , et al. December 2, 2	2003-12-02
Fin FET devices from bulk semiconductor and method for forming Grant 6,642,090 - Fried , et al. November 4, 2	2003-11-04
Strained fin fets structure and method App 20030201458 - Clark, William F. ; et al.	2003-10-30
Fin Memory Cell And Method Of Fabrication App 20030197194 - Fried, David M. ; et al.	2003-10-23
Strained fin FETs structure and method Grant 6,635,909 - Clark , et al. October 21, 2	2003-10-21
Integrated circuit with capacitors having fin structure App 20030193058 - Fried, David M. ; et al.	2003-10-16
Dual double gate transistor and method for forming App 20030193065 - Fried, David M. ; et al.	2003-10-16
Finfet CMOS with NVRAM capability App 20030178670 - Fried, David M. ; et al.	2003-09-25
Strained Fin Fets Structure And Method App 20030178677 - Clark, William F. ; et al.	2003-09-25
Strained fin FETs structure and method App 20030178681 - Clark, William F. ; et al.	2003-09-25
Kerf circuit for modeling of BEOL capacitances Grant 6,624,651 - Fried , et al. September 23, 2	2003-09-23
Finfet layout generation App 20030145299 - Fried, David M. ; et al.	2003-07-31
Fin-type resistors App 20030141569 - Fried, David M. ; et al.	2003-07-31
Self-aligned dog-bone structure for FinFET applications and methods to fabricate the same Grant 6,583,469 - Fried , et al. June 24, 2	2003-06-24
Implanted asymmetric doped polysilicon gate FinFET App 20030113970 - Fried, David M. ; et al.	2003-06-19
Multiple-plane finFET CMOS App 20030102497 - Fried, David M. ; et al.	2003-06-05
Finfet SRAM cell using low mobility plane for cell stability and method for forming App 20030102518 - Fried, David M. ; et al.	2003-06-05
Computation of supply chain planning process efficiency Grant 6,546,303 - Fried , et al. April 8, 2	2003-04-08
Double gated transistor and method of fabrication App 20020197781 - Bryant, Andres ; et al.	2002-12-26
Method and system for including parametric in-line test data in simulations for improved model to hardware correlation App 20020193892 - Bertsch, John E. ; et al.	2002-12-19

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