| Patent | Date |
|---|
Program counter (PC)-relative load and store addressing for fused instructions
Grant 11,392,386 - Orzol , et al. July 19, 2 | 2022-07-19 |
Program Counter (pc)-relative Load And Store Addressing
App 20220050684 - Orzol; Nicholas R. ; et al. | 2022-02-17 |
On-the-fly Adjustment Of Issue-write Back Latency To Avoid Write Back Collisions Using A Result Buffer
App 20220035637 - Barrick; Brian D. ; et al. | 2022-02-03 |
Method to determine the oldest instruction in an instruction queue of a processor with multiple instruction threads
Grant 11,182,167 - Ingimundarson , et al. November 23, 2 | 2021-11-23 |
Fusion to enhance early address generation of load instructions in a microprocessor
Grant 11,163,571 - Barrick , et al. November 2, 2 | 2021-11-02 |
Thread-based organization of slice target register file entry in a microprocessor to permit writing scalar or vector data to portions of a single register file entry
Grant 11,157,276 - Battle , et al. October 26, 2 | 2021-10-26 |
Banked slice-target register file for wide dataflow execution in a microprocessor
Grant 11,093,246 - Boersma , et al. August 17, 2 | 2021-08-17 |
Low latency execution of floating-point record form instructions
Grant 10,996,953 - Barrick , et al. May 4, 2 | 2021-05-04 |
Banked Slice-target Register File For Wide Dataflow Execution In A Microprocessor
App 20210072991 - Boersma; Maarten J. ; et al. | 2021-03-11 |
Thread-based Organization Of Slice Target Register File Entry In A Microprocessor
App 20210072993 - Battle; Steven J. ; et al. | 2021-03-11 |
Method to execute successive dependent instructions from an instruction stream in a processor
Grant 10,831,496 - Boersma , et al. November 10, 2 | 2020-11-10 |
Method To Determine The Oldest Instruction In An Instruction Queue Of A Processor With Multiple Instruction Threads
App 20200293328 - Ingimundarson; Arni ; et al. | 2020-09-17 |
Arithmetic logic unit for single-cycle fusion operations
Grant 10,768,897 - Boersma , et al. Sep | 2020-09-08 |
Method To Execute Successive Dependent Instructions From An Instruction Stream In A Processor
App 20200278868 - Boersma; Maarten J. ; et al. | 2020-09-03 |
Low latency execution of floating-point record form instructions
Grant 10,678,547 - Barrick , et al. | 2020-06-09 |
Low latency execution of floating-point record form instructions
Grant 10,592,246 - Barrick , et al. | 2020-03-17 |
Arithmetic logic unit for single-cycle fusion operations
Grant 10,545,727 - Boersma , et al. Ja | 2020-01-28 |
Arithmetic Logic Unit For Single-cycle Fusion Operations
App 20200019376 - Boersma; Maarten J. ; et al. | 2020-01-16 |
Low Latency Execution Of Floating-point Record Form Instructions
App 20190391810 - Barrick; Brian J.D. ; et al. | 2019-12-26 |
Cracked execution of move-to-FPSCR instructions
Grant 10,360,036 - Barrick , et al. | 2019-07-23 |
Arithmetic Logic Unit For Single-cycle Fusion Operations
App 20190212984 - Boersma; Maarten J. ; et al. | 2019-07-11 |
Low Latency Execution Of Floating-point Record Form Instructions
App 20190018684 - Barrick; Brian J.D. ; et al. | 2019-01-17 |
Cracked Execution Of Move-to-fpscr Instructions
App 20190018678 - Barrick; Brian J.D. ; et al. | 2019-01-17 |
Low Latency Execution Of Floating-point Record Form Instructions
App 20190018685 - Barrick; Brian J.D. ; et al. | 2019-01-17 |
In-pipe error scrubbing within a processor core
Grant 9,928,128 - Barrick , et al. March 27, 2 | 2018-03-27 |
In-pipe Error Scrubbing Within A Processor Core
App 20170286202 - BARRICK; BRIAN D. ; et al. | 2017-10-05 |
Method for calculating an effect on timing of moving a pin from an edge to an inboard position in processing large block synthesis (LBS)
Grant 9,727,687 - Daellenbach , et al. August 8, 2 | 2017-08-08 |
Optimization of integrated circuit physical design
Grant 9,536,030 - Fricke , et al. January 3, 2 | 2017-01-03 |
Method for calculating an effect on timing of moving a pin from an edge to an inboard position in processing large block synthesis (LBS)
Grant 9,418,198 - Daellenbach , et al. August 16, 2 | 2016-08-16 |
Method For Calculating An Effect On Timing Of Moving A Pin From An Edge To An Inboard Position In Processing Large Block Synthesis (lbs)
App 20160232273 - Daellenbach; Lukas ; et al. | 2016-08-11 |
Method For Calculating An Effect On Timing Of Moving A Pin From An Edge To An Inboard Position In Processing Large Block Synthesis (lbs)
App 20160232276 - Daellenbach; Lukas ; et al. | 2016-08-11 |
Optimization Of Integrated Circuit Physical Design
App 20150363531 - Fricke; Niels ; et al. | 2015-12-17 |
Method and data processing system to optimize performance of an electric circuit design, data processing program and computer program product
Grant 8,522,187 - Fricke , et al. August 27, 2 | 2013-08-27 |
Method And Data Processing System To Optimize Performance Of An Electric Circuit Design, Data Processing Program And Computer Program Product
App 20120144362 - Fricke; Niels ; et al. | 2012-06-07 |
Integrated Circuit on a Semiconductor Chip with a Phase Shift Circuit and a Method for Digital Phase Shifting
App 20080272817 - Fricke; Niels | 2008-11-06 |
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