loadpatents
name:-0.011081218719482
name:-0.013678073883057
name:-0.0013630390167236
French; William D. Patent Filings

French; William D.

Patent Applications and Registrations

Patent applications and USPTO patent grants for French; William D..The latest application filed is for "conductor design for integrated magnetic devices".

Company Profile
1.13.13
  • French; William D. - San Jose CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Conductor design for integrated magnetic devices
Grant 11,393,787 - Lee , et al. July 19, 2
2022-07-19
Conductor Design For Integrated Magnetic Devices
App 20190164934 - Lee; Dok Won ;   et al.
2019-05-30
Conductor Design For Integrated Magnetic Devices
App 20150340338 - Lee; Dok Won ;   et al.
2015-11-26
Method Of Manufacturing A Micro-fabricated Wafer Level Integrated Inductor Or Transformer For High Frequency Switch Mode Power Supplies
App 20150340422 - Lee; Dok Won ;   et al.
2015-11-26
Structure and fabrication of asymmetric field-effect transistor having asymmetric channel zone and differently configured source/drain extensions
Grant 8,629,027 - Bulucea , et al. January 14, 2
2014-01-14
Structure and fabrication of field-effect transistor using empty well in combination with source/drain extensions or/and halo pocket
Grant 8,410,549 - Bulucea , et al. April 2, 2
2013-04-02
Structure and fabrication of like-polarity field-effect transistors having different configurations of source/drain extensions, halo pockets, and gate dielectric thicknesses
Grant 8,377,768 - Bulucea , et al. February 19, 2
2013-02-19
Configuration and fabrication of semiconductor structure using empty and filled wells
Grant 8,304,835 - Bulucea , et al. November 6, 2
2012-11-06
Configuration and fabrication of semiconductor structure in which source and drain extensions of field-effect transistor are defined with different dopants
Grant 8,304,320 - Bahl , et al. November 6, 2
2012-11-06
Structure and Fabrication of Like-polarity Field-effect Transistors Having Different Configurations of Source/Drain Extensions, Halo Pockets, and Gate Dielectric Thicknesses
App 20120264263 - Bulucea; Constantin ;   et al.
2012-10-18
Configuration and Fabrication of Semiconductor Structure in Which Source and Drain Extensions of Field-effect Transistor Are Defined with Different Dopants
App 20120184077 - Bahl; Sandeep R. ;   et al.
2012-07-19
Fabrication of asymmetric field-effect transistors using L-shaped spacers
Grant 8,101,479 - Parker , et al. January 24, 2
2012-01-24
Structure and fabrication of like-polarity field-effect transistors having different configurations of source/drain extensions, halo pockets, and gate dielectric thicknesses
Grant 8,084,827 - Bulucea , et al. December 27, 2
2011-12-27
Semiconductor structure in which source and drain extensions of field-effect transistor are defined with different dopants
Grant 7,973,372 - Bahl , et al. July 5, 2
2011-07-05
Asymmetric field-effect transistor having asymmetric channel zone and differently configured source/drain extensions
Grant 7,968,921 - Bulucea , et al. June 28, 2
2011-06-28
Structure and fabrication of asymmetric field-effect transistor having asymmetric channel zone and differently configured source/drain extensions
App 20100244131 - Bulucea; Constantin ;   et al.
2010-09-30
Configuration and fabrication of semiconductor structure in which source and drain extensions of field-effect transistor are defined with different dopants
App 20100244150 - Bahl; Sandeep R. ;   et al.
2010-09-30
Configuration and fabrication of semiconductor structure using empty and filled wells
App 20100244128 - Bulucea; Constantin ;   et al.
2010-09-30
Fabrication and structure of asymmetric field-effect transistors using L-shaped spacers
App 20100244106 - Parker; D. Courtney ;   et al.
2010-09-30
Structure and fabrication of field-effect transistor using empty well in combination with source/drain extensions or/and halo pocket
App 20100244130 - Bulucea; Constantin ;   et al.
2010-09-30
Configuration and fabrication of semiconductor structure having extended-drain field-effect transistor
App 20100244152 - Bahl; Sandeep R. ;   et al.
2010-09-30
Structure and fabrication of like-polarity field-effect transistors having different configurations of source/drain extensions, halo pockets, and gate dielectric thicknesses
App 20100244149 - Bulucea; Constantin ;   et al.
2010-09-30
Structure and fabrication of field-effect transistor having source/drain extension defined by multiple local concentration maxima
App 20100244151 - French; William D. ;   et al.
2010-09-30

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed