loadpatents
name:-0.051408052444458
name:-0.045042991638184
name:-0.0030090808868408
Freeman; Gregory G. Patent Filings

Freeman; Gregory G.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Freeman; Gregory G..The latest application filed is for "modulation of the morphology of epitaxial semiconductor material".

Company Profile
2.45.45
  • Freeman; Gregory G. - Wappingers Falls NY
  • Freeman; Gregory G. - Hopewell Junction NY
  • Freeman; Gregory G. - Wappinger Falls NY
  • Freeman; Gregory G. - Hopewell Jct. NY
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
On-chip sensor for monitoring active circuits on integrated circuit (IC) chips
Grant 10,191,108 - Freeman , et al. Ja
2019-01-29
Methods of modulating the morphology of epitaxial semiconductor material
Grant 9,953,873 - Chandra , et al. April 24, 2
2018-04-24
Reducing thermal runaway in inverter devices
Grant 9,906,213 - Freeman , et al. February 27, 2
2018-02-27
Modulation Of The Morphology Of Epitaxial Semiconductor Material
App 20170345719 - Chandra; Bhupesh ;   et al.
2017-11-30
On-chip Sensor For Monitoring Active Circuits On Integrated Circuit (ic) Chips
App 20170146592 - Freeman; Gregory G. ;   et al.
2017-05-25
Reducing Thermal Runaway In Inverter Devices
App 20170133923 - Freeman; Gregory G. ;   et al.
2017-05-11
Method for an efficient modeling of the impact of device-level self-heating on electromigration limited current specifications
Grant 9,552,455 - Poindexter , et al. January 24, 2
2017-01-24
Method for an Efficient Modeling of the Impact of Device-Level Self-Heating on Electromigration Limited Current Specifications
App 20160224717 - Poindexter; Daniel J. ;   et al.
2016-08-04
Semiconductor device having diffusion barrier to reduce back channel leakage
Grant 9,406,569 - Freeman , et al. August 2, 2
2016-08-02
Stress-generating structure for semiconductor-on-insulator devices
Grant 9,305,999 - Zhu , et al. April 5, 2
2016-04-05
Faceted intrinsic epitaxial buffer layer for reducing short channel effects while maximizing channel stress levels
Grant 9,287,399 - Chandra , et al. March 15, 2
2016-03-15
Semiconductor device having diffusion barrier to reduce back channel leakage
Grant 9,240,354 - Freeman , et al. January 19, 2
2016-01-19
Faceted Intrinsic Epitaxial Buffer Layer For Reducing Short Channel Effects While Maximizing Channel Stress Levels
App 20150084096 - Chandra; Bhupesh ;   et al.
2015-03-26
Semiconductor Device Having Diffusion Barrier To Reduce Back Channel Leakage
App 20150056760 - Freeman; Gregory G. ;   et al.
2015-02-26
Faceted intrinsic epitaxial buffer layer for reducing short channel effects while maximizing channel stress levels
Grant 8,940,595 - Chandra , et al. January 27, 2
2015-01-27
Faceted Intrinsic Epitaxial Buffer Layer For Reducing Short Channel Effects While Maximizing Channel Stress Levels
App 20140264558 - Chandra; Bhupesh ;   et al.
2014-09-18
Semiconductor Device Having Diffusion Barrier To Reduce Back Channel Leakage
App 20140131782 - Freeman; Gregory G. ;   et al.
2014-05-15
Stress-generating structure for semiconductor-on-insulator devices
Grant 8,629,501 - Zhu , et al. January 14, 2
2014-01-14
Stress-generating Structure For Semiconductor-on-insulator Devices
App 20130168804 - Zhu; Huilong ;   et al.
2013-07-04
Gated diode structure and method including relaxed liner
Grant 8,232,603 - Chou , et al. July 31, 2
2012-07-31
Stress-generating Structure For Semiconductor-on-insulator Devices
App 20120139081 - Zhu; Huilong ;   et al.
2012-06-07
Semiconductor-on-insulator structures including a trench containing an insulator stressor plug and method of fabricating same
Grant 8,115,254 - Zhu , et al. February 14, 2
2012-02-14
Method of creating asymmetric field-effect-transistors
Grant 8,017,483 - Freeman , et al. September 13, 2
2011-09-13
High performance schottky-barrier-source asymmetric MOSFETs
Grant 7,863,143 - Liang , et al. January 4, 2
2011-01-04
Method Of Creating Asymmetric Field-effect-transistors
App 20100330763 - Freeman; Gregory G. ;   et al.
2010-12-30
Gated Diode Structure and Method Including Relaxed Liner
App 20100237421 - Chou; Anthony I. ;   et al.
2010-09-23
Methods for forming high performance gates and structures thereof
Grant 7,790,553 - Zhu , et al. September 7, 2
2010-09-07
Method of forming a resistor and an FET from the metal portion of a MOSFET metal gate stack
Grant 7,749,822 - Freeman , et al. July 6, 2
2010-07-06
Creating increased mobility in a bipolar device
Grant 7,741,186 - Chidambarrao , et al. June 22, 2
2010-06-22
Methods For Forming High Performance Gates And Structures Thereof
App 20100006926 - ZHU; HUILONG ;   et al.
2010-01-14
Method of fabricating self-aligned bipolar transistor having tapered collector
Grant 7,615,457 - Akatsu , et al. November 10, 2
2009-11-10
High Performance Schottky-barrier-source Asymmetric Mosfets
App 20090273040 - Liang; Qingqing ;   et al.
2009-11-05
Bipolar transistor with isolation and direct contacts
Grant 7,611,953 - Ahlgren , et al. November 3, 2
2009-11-03
Bipolar transistor self-alignment with raised extrinsic base extension and methods of forming same
Grant 7,611,954 - Freeman , et al. November 3, 2
2009-11-03
Resistor And Fet Formed From The Metal Portion Of A Mosfet Metal Gate Stack
App 20090090977 - Freeman; Gregory G. ;   et al.
2009-04-09
Stress-generating Structure For Semiconductor-on-insulator Devices
App 20090079026 - Zhu; Huilong ;   et al.
2009-03-26
Sram Cells With Asymmetric Floating-body Pass-gate Transistors
App 20090073758 - Freeman; Gregory G. ;   et al.
2009-03-19
Methods to improve the SiGe heterojunction bipolar device performance
Grant 7,476,914 - Dokumaci , et al. January 13, 2
2009-01-13
Method of fabricating self-aligned bipolar transistor having tapered collector
App 20080318373 - Akatsu; Hiroyuki ;   et al.
2008-12-25
Bipolar transistor having self-aligned silicide and a self-aligned emitter contact border
Grant 7,466,010 - Ahlgren , et al. December 16, 2
2008-12-16
Bipolar transistor with collector having an epitaxial Si:C region
Grant 7,442,595 - Freeman , et al. October 28, 2
2008-10-28
Structure and method of self-aligned bipolar transistor having tapered collector
Grant 7,425,754 - Akatsu , et al. September 16, 2
2008-09-16
METHODS TO IMPROVE THE SiGe HETEROJUNCTION BIPOLAR DEVICE PERFORMANCE
App 20080128861 - Dokumaci; Omer H. ;   et al.
2008-06-05
Field effect transistor having an asymmetrically stressed channel region
Grant 7,355,221 - Freeman , et al. April 8, 2
2008-04-08
Bipolar structure with two base-emitter junctions in the same circuit
Grant 7,348,250 - Freeman March 25, 2
2008-03-25
Creating Increased Mobility In A Bipolar Device
App 20080067631 - Chidambarrao; Dureseti ;   et al.
2008-03-20
Creating increased mobility in a bipolar device
Grant 7,329,941 - Chidambarrao , et al. February 12, 2
2008-02-12
Self-aligned mask formed utilizing differential oxidation rates of materials
Grant 7,288,827 - Chen , et al. October 30, 2
2007-10-30
Bipolar Transistor With Isolation And Direct Contacts
App 20070145533 - AHLGREN; David C. ;   et al.
2007-06-28
Bipolar transistor with isolation and direct contacts
Grant 7,217,988 - Ahlgren , et al. May 15, 2
2007-05-15
Bipolar transistor with a very narrow emitter feature
Grant 7,180,157 - Freeman , et al. February 20, 2
2007-02-20
Bipolar transistor with collector having an epitaxial Si:C region
Grant 7,170,083 - Freeman , et al. January 30, 2
2007-01-30
Bipolar transistor with collector having an epitaxial Si:C region
App 20060289852 - Freeman; Gregory G. ;   et al.
2006-12-28
Methods to improve the SiGe heterojunction bipolar device performance
Grant 7,144,787 - Dokumaci , et al. December 5, 2
2006-12-05
Structure And Method Of Making A Field Effect Transistor Having An Asymmetrically Stressed Channel Region
App 20060255415 - Freeman; Gregory G. ;   et al.
2006-11-16
Methods To Improve The Sige Heterojunction Bipolar Device Performance
App 20060252216 - Dokumaci; Omer H. ;   et al.
2006-11-09
Bipolar transistor with extrinsic stress layer
Grant 7,102,205 - Chidambarrao , et al. September 5, 2
2006-09-05
BIPOLAR TRANSISTOR WITH COLLECTOR HAVING AN EPITAXIAL Si:C REGION
App 20060154476 - Freeman; Gregory G. ;   et al.
2006-07-13
Bipolar transistor with extrinsic stress layer
App 20060043529 - Chidambarrao; Dureseti ;   et al.
2006-03-02
Creating Increased Mobility In A Bipolar Device
App 20060019458 - Chidambarrao; Dureseti ;   et al.
2006-01-26
Bipolar transistor having self-aligned silicide and a self-aligned emitter contact border
Grant 6,979,884 - Ahlgren , et al. December 27, 2
2005-12-27
Bipolar Transistor With Isolation And Direct Contacts
App 20050269664 - Ahlgren, David C. ;   et al.
2005-12-08
Bipolar transistor having self-aligned silicide and a self-aligned emitter contact border
App 20050242373 - Ahlgren, David C. ;   et al.
2005-11-03
Bipolar transistor self-alignment with raised extrinsic base extension and methods of forming same
Grant 6,960,820 - Freeman , et al. November 1, 2
2005-11-01
Bipolar transistor self-alignment with raised extrinsic base extension and methods of forming same
App 20050233535 - Freeman, Gregory G. ;   et al.
2005-10-20
Structure And Method Of Self-aligned Bipolar Transistor Having Tapered Collector
App 20050184359 - Akatsu, Hiroyuki ;   et al.
2005-08-25
Bipolar device having shallow junction raised extrinsic base and method for making the same
Grant 6,927,476 - Freeman , et al. August 9, 2
2005-08-09
Bipolar structure with two base-emitter junctions in the same circuit
App 20050145990 - Freeman, Gregory G.
2005-07-07
Bipolar transistor having self-aligned silicide and a self-aligned emitter contact border
App 20050121748 - Ahlgren, David C. ;   et al.
2005-06-09
Bipolar transistor with a very narrow emitter feature
App 20050082642 - Freeman, Gregory G. ;   et al.
2005-04-21
Self-aligned mask formed utilizing differential oxidation rates of materials
App 20050079726 - Chen, Huajie ;   et al.
2005-04-14
Bipolar structure with two base-emitter junctions in the same circuit
Grant 6,864,517 - Freeman March 8, 2
2005-03-08
Method for creation of a very narrow emitter feature
Grant 6,858,485 - Freeman , et al. February 22, 2
2005-02-22
Bipolar Transistor Self-alignment With Raised Extrinsic Base Extension And Methods Of Forming Same
App 20050012180 - Freeman, Gregory G. ;   et al.
2005-01-20
Self-aligned mask formed utilizing differential oxidation rates of materials
Grant 6,844,225 - Chen , et al. January 18, 2
2005-01-18
Method For Creation Of A Very Narrow Emitter Feature And Structure Provided Thereby
App 20040222496 - Freeman, Gregory G. ;   et al.
2004-11-11
Bipolar device having non-uniform depth base-emitter junction
Grant 6,803,642 - Freeman , et al. October 12, 2
2004-10-12
BiCMOS integration scheme with raised extrinsic base
Grant 6,780,695 - Chen , et al. August 24, 2
2004-08-24
Bipolar structure with two base-emitter junctions in the same circuit
App 20040135137 - Freeman, Gregory G.
2004-07-15
Self-aligned mask formed utilizing differential oxidation rates of materials
App 20040137670 - Chen, Huajie ;   et al.
2004-07-15
Bipolar transistor with raised extrinsic base fabricated in an integrated BiCMOS circuit
Grant 6,667,521 - Ahlgren , et al. December 23, 2
2003-12-23
Bipolar device having non-uniform depth base-emitter junction
App 20030109109 - Freeman, Gregory G. ;   et al.
2003-06-12
Bipolar transistor with raised extrinsic base fabricated in an integrated BiCMOS circuit
App 20030064555 - Ahlgren, David C. ;   et al.
2003-04-03
Bipolar device having shallow junction raised extrinsic base and method for making the same
App 20030057458 - Freeman, Gregory G. ;   et al.
2003-03-27
Dual sidewall spacer for a self-aligned extrinsic base in SiGe heterojunction bipolar transistors
Grant 6,531,720 - Freeman , et al. March 11, 2
2003-03-11
Bipolar Transistor With Raised Extrinsic Base Fabricated In An Integrated Bicmos Circuit
App 20020197783 - Ahlgren, David C. ;   et al.
2002-12-26
Bipolar transistor with raised extrinsic base fabricated in an integrated BiCMOS circuit
Grant 6,492,238 - Ahlgren , et al. December 10, 2
2002-12-10
Dual sidewall spacer for a self-aligned extrinsic base in SiGe heterojunction bipolar transistors
App 20020153535 - Freeman, Gregory G. ;   et al.
2002-10-24
Stepped collector implant and method for fabrication
App 20020132434 - Freeman, Gregory G. ;   et al.
2002-09-19

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