| Patent | Date |
|---|
Authorizing Uses Of Goods Or Services Using Bonding Agreement
App 20220182371 - FREDRICKSON; Mark S. ; et al. | 2022-06-09 |
Analysis of verification parameters for training reduction
Grant 11,341,034 - Albertson , et al. May 24, 2 | 2022-05-24 |
Network-based authorization for disconnected devices
Grant 11,184,354 - Albertson , et al. November 23, 2 | 2021-11-23 |
Authenticating Digital Recordings
App 20210151081 - ALBERTSON; Chad ; et al. | 2021-05-20 |
Authenticating digital recordings
Grant 10,957,355 - Albertson , et al. March 23, 2 | 2021-03-23 |
Network-based Authorization For Disconnected Devices
App 20200304495 - ALBERTSON; Chad ; et al. | 2020-09-24 |
Analysis Of Verification Parameters For Training Reduction
App 20200042434 - ALBERTSON; Chad ; et al. | 2020-02-06 |
Techniques for faster loading of data for accelerators
Grant 10,528,399 - Fredrickson , et al. J | 2020-01-07 |
Authenticating Digital Recordings
App 20190267036 - ALBERTSON; Chad M. ; et al. | 2019-08-29 |
Techniques For Faster Loading Of Data For Accelerators
App 20190213050 - FREDRICKSON; Mark S. ; et al. | 2019-07-11 |
Communicating in an integrated circuit using hardware-managed virtual channels
Grant 9,501,439 - Fredrickson , et al. November 22, 2 | 2016-11-22 |
Delayed execution of program code on multiple processors
Grant 9,405,315 - Bellows , et al. August 2, 2 | 2016-08-02 |
Methods And Systems With Delayed Execution Of Multiple Processors
App 20150355673 - Bellows; Mark D. ; et al. | 2015-12-10 |
Methods and systems with delayed execution of multiple processors
Grant 9,146,835 - Bellows , et al. September 29, 2 | 2015-09-29 |
Variable Depth Instruction Fifos To Implement Simd Architecture
App 20140195777 - Bellows; Mark D. ; et al. | 2014-07-10 |
Multiple Processor Delayed Execution
App 20130179720 - Bellows; Mark D. ; et al. | 2013-07-11 |
Heuristic clustering of circuit elements in a circuit design
Grant 8,196,074 - Fredrickson , et al. June 5, 2 | 2012-06-05 |
Methods and apparatus for reducing command processing latency while maintaining coherence
Grant 8,112,590 - Brown , et al. February 7, 2 | 2012-02-07 |
Heuristic Clustering Of Circuit Elements In A Circuit Design
App 20090178014 - Fredrickson; Mark S. ; et al. | 2009-07-09 |
Method, apparatus and computer program product for designing logic scan chains for matching gated portions of a clock tree
Grant 7,543,204 - Fredrickson , et al. June 2, 2 | 2009-06-02 |
Heuristic clustering of circuit elements in a circuit design
Grant 7,509,611 - Fredrickson , et al. March 24, 2 | 2009-03-24 |
Method, apparatus and computer program product for implementing scan-chain-specific control signals as part of a scan chain
Grant 7,475,307 - Fredrickson , et al. January 6, 2 | 2009-01-06 |
Trading Propensity-based Clustering Of Circuit Elements In A Circuit Design
App 20080307281 - Fredrickson; Mark S. ; et al. | 2008-12-11 |
Trading propensity-based clustering of circuit elements in a circuit design
Grant 7,430,699 - Fredrickson , et al. September 30, 2 | 2008-09-30 |
Automatic back annotation of a functional definition of an integrated circuit design based upon physical layout
Grant 7,398,505 - Fredrickson , et al. July 8, 2 | 2008-07-08 |
Automatic Back Annotation Of A Functional Definition Of An Integrated Circuit Design Based Upon Physical Layout
App 20080141210 - Fredrickson; Mark S. ; et al. | 2008-06-12 |
Method, Apparatus And Computer Program Product For Implementing Scan-chain-specific Control Signals As Part Of A Scan Chain
App 20080133992 - Fredrickson; Mark S. ; et al. | 2008-06-05 |
Method, apparatus and computer program product for implementing scan-chain-specific control signals as part of a scan chain
Grant 7,350,122 - Fredrickson , et al. March 25, 2 | 2008-03-25 |
Methods And Apparatus For Reducing Command Processing Latency While Maintaining Coherence
App 20080052472 - Brown; Jeffrey Douglas ; et al. | 2008-02-28 |
Fair hierarchical arbiter
Grant 7,302,510 - Fredrickson , et al. November 27, 2 | 2007-11-27 |
Trading propensity-based clustering of circuit elements in a circuit design
App 20070260949 - Fredrickson; Mark S. ; et al. | 2007-11-08 |
Heuristic clustering of circuit elements in a circuit design
App 20070186199 - Fredrickson; Mark S. ; et al. | 2007-08-09 |
Automatic back annotation of a functional definition of an integrated circuit design based upon physical layout
App 20070186204 - Fredrickson; Mark S. ; et al. | 2007-08-09 |
Methods and apparatus for reducing command processing latency while maintaining coherence
App 20070186052 - Brown; Jeffrey Douglas ; et al. | 2007-08-09 |
Method, apparatus and computer program product for designing logic scan chains for matching gated portions of a clock tree
App 20070168797 - Fredrickson; Mark S. ; et al. | 2007-07-19 |
Method, apparatus and computer program product for implementing scan-chain-specific control signals as part of a scan chain
App 20070101221 - Fredrickson; Mark S. ; et al. | 2007-05-03 |
Fair hierarchical arbiter
App 20070073949 - Fredrickson; Mark S. ; et al. | 2007-03-29 |
Several improvements for timing diagrams
Grant 6,745,376 - Fredrickson June 1, 2 | 2004-06-01 |
Interactive client-server environment for performing collaborative timing analysis of circuit designs
Grant 6,643,683 - Drumm , et al. November 4, 2 | 2003-11-04 |
Several improvements for timing diagrams
App 20030052880 - Fredrickson, Mark S. | 2003-03-20 |
Method for converting timing diagram into timing graph and vice versa
Grant 6,181,320 - Fredrickson January 30, 2 | 2001-01-30 |
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