Fredenburg; Jeffrey

Patent Applications and Registrations

Patent applications and USPTO patent grants for Fredenburg; Jeffrey.The latest application filed is for "frequency measurement circuit with adaptive accuracy".

Company Profile

13.9.12

Fredenburg; Jeffrey - Ann Arbor MI

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Frequency Measurement Circuit With Adaptive Accuracy App 20210258013 - Wu; Xiao ; et al.	2021-08-19
Frequency Counter Circuit For Detecting Timing Violations App 20210255661 - Fredenburg; Jeffrey ; et al.	2021-08-19
Locked loop circuit and method with digitally-controlled oscillator (DCO) gain normalization Grant 11,070,215 - Candler , et al. July 20, 2	2021-07-20
Locked loop circuit and method with digitally-controlled oscillator (DCO) gain normalization Grant 11,070,216 - Candler , et al. July 20, 2	2021-07-20
Timing analysis for parallel multi-state driver circuits Grant 11,017,138 - Fredenburg , et al. May 25, 2	2021-05-25
Locked Loop Circuit And Method With Digitally-controlled Oscillator (dco) Gain Normalization App 20200304131 - Candler; Frederick Christopher ; et al.	2020-09-24
Timing Analysis For Parallel Multi-state Driver Circuits App 20200285794 - Fredenburg; Jeffrey ; et al.	2020-09-10
Integrated circuit design system with automatic timing margin reduction Grant 10,740,526 - Fredenburg , et al. A	2020-08-11
Locked Loop Circuit And Method With Digitally-controlled Oscillator (dco) Gain Normalization App 20200235746 - Candler; Frederick Christopher ; et al.	2020-07-23
Integrated circuit design system with automatic timing margin reduction Grant 10,713,409 - Fredenburg , et al.	2020-07-14
Timing analysis for electronic design automation of parallel multi-state driver circuits Grant 10,614,182 - Fredenburg , et al.	2020-04-07
Locked loop circuit and method with digitally-controlled oscillator (DCO) gain normalization Grant 10,594,323 - Candler , et al.	2020-03-17
Locked loop circuit with configurable second error input Grant 10,587,275 - Fredenburg , et al.	2020-03-10
Locked Loop Circuit And Method With Digitally-controlled Oscillator (dco) Gain Normalization App 20190386663 - Candler; Frederick Christopher ; et al.	2019-12-19
Integrated Circuit Design System With Automatic Timing Margin Reduction App 20190213297 - Fredenburg; Jeffrey ; et al.	2019-07-11
Locked Loop Circuit With Configurable Second Error Input App 20190190525 - Fredenburg; Jeffrey ; et al.	2019-06-20
Concurrently Optimized System-on-chip Implementation With Automatic Synthesis And Integration App 20190087516 - Fredenburg; Jeffrey ; et al.	2019-03-21
Integrated Circuit Design System With Automatic Timing Margin Reduction App 20190050517 - Fredenburg; Jeffrey ; et al.	2019-02-14
Concurrently optimized system-on-chip implementation with automatic synthesis and integration Grant 10,031,992 - Fredenburg , et al. July 24, 2	2018-07-24
Concurrently Optimized System-on-chip Implementation With Automatic Synthesis And Integration App 20180181684 - Fredenburg; Jeffrey ; et al.	2018-06-28
Timing Analysis For Electronic Design Automation Of Parallel Multi-state Driver Circuits App 20180107774 - Fredenburg; Jeffrey ; et al.	2018-04-19

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