loadpatents
Patent applications and USPTO patent grants for Fratin; Lorenzo.The latest application filed is for "memory device and method for manufacturing the same".
Patent | Date |
---|---|
Memory Device And Method For Manufacturing The Same App 20220302211 - Fratin; Lorenzo ;   et al. | 2022-09-22 |
Memory Device And Method For Manufacturing The Same App 20220302210 - Fratin; Lorenzo ;   et al. | 2022-09-22 |
Apparatuses including multi-level memory cells and methods of operation of same Grant 11,443,799 - Tortorelli , et al. September 13, 2 | 2022-09-13 |
Decoding for a memory device Grant 11,423,981 - Fantini , et al. August 23, 2 | 2022-08-23 |
Techniques for forming self-aligned memory structures Grant 11,417,841 - Russell , et al. August 16, 2 | 2022-08-16 |
Decoding for a memory device Grant 11,417,394 - Fratin , et al. August 16, 2 | 2022-08-16 |
Self-selecting memory array with horizontal access lines Grant 11,404,117 - Fratin , et al. August 2, 2 | 2022-08-02 |
Architecture Of Three-dimensional Memory Device And Methods Regarding The Same App 20220208602 - Fratin; Lorenzo ;   et al. | 2022-06-30 |
Decoding For A Memory Device App 20220189549 - Fratin; Lorenzo ;   et al. | 2022-06-16 |
Decoding For A Memory Device App 20220189548 - Fantini; Paolo ;   et al. | 2022-06-16 |
Split Pillar Architectures For Memory Devices App 20220173164 - Fantini; Paolo ;   et al. | 2022-06-02 |
Split pillar architectures for memory devices Grant 11,282,895 - Fantini , et al. March 22, 2 | 2022-03-22 |
Self-selecting memory cell with dielectric barrier Grant 11,271,153 - Fratin , et al. March 8, 2 | 2022-03-08 |
Method For Manufacturing A Memory Device And Memory Device Manufactured Through The Same Method App 20220051944 - Fantini; Paolo ;   et al. | 2022-02-17 |
Architecture of three-dimensional memory device and methods regarding the same Grant 11,244,855 - Fratin , et al. February 8, 2 | 2022-02-08 |
Three-dimensional Memory Array App 20210408121 - Fantini; Paolo ;   et al. | 2021-12-30 |
Microelectronic Devices With Self-aligned Interconnects, And Related Methods App 20210351125 - Russell; Stephen W. ;   et al. | 2021-11-11 |
Three-dimensional memory array Grant 11,121,180 - Fantini , et al. September 14, 2 | 2021-09-14 |
Chalcogenide memory device components and composition Grant 11,114,615 - Varesi , et al. September 7, 2 | 2021-09-07 |
Three Dimensional Memory Arrays App 20210257408 - Pellizzer; Fabio ;   et al. | 2021-08-19 |
Composite Electrode Material Chemistry App 20210249598 - Zheng; Pengyuan ;   et al. | 2021-08-12 |
Memory Device With A Split Pillar Architecture App 20210225934 - Fratin; Lorenzo ;   et al. | 2021-07-22 |
Methods for forming microelectronic devices with self-aligned interconnects, and related devices and systems Grant 11,069,610 - Russell , et al. July 20, 2 | 2021-07-20 |
Three dimensional memory arrays Grant 10,998,379 - Pellizzer , et al. May 4, 2 | 2021-05-04 |
Memory Array With Graded Memory Stack Resistances App 20210111226 - Pellizzer; Fabio ;   et al. | 2021-04-15 |
Methods For Forming Microelectronic Devices With Self-aligned Interconnects, And Related Devices And Systems App 20210111118 - Russell; Stephen W. ;   et al. | 2021-04-15 |
Memory device with a split pillar architecture Grant 10,930,707 - Fratin , et al. February 23, 2 | 2021-02-23 |
Techniques For Forming Self-aligned Memory Structures App 20210050521 - Russell; Stephen W. ;   et al. | 2021-02-18 |
Memory array with graded memory stack resistances Grant 10,910,438 - Pellizzer , et al. February 2, 2 | 2021-02-02 |
Phase change memory structures and devices Grant 10,892,406 - Russell , et al. January 12, 2 | 2021-01-12 |
Split Pillar Architectures For Memory Devices App 20210005665 - Fantini; Paolo ;   et al. | 2021-01-07 |
Memory Device With A Split Pillar Architecture App 20210005664 - Fratin; Lorenzo ;   et al. | 2021-01-07 |
Architecture Of Three-dimensional Memory Device And Methods Regarding The Same App 20200350203 - Fratin; Lorenzo ;   et al. | 2020-11-05 |
Memory Array With Graded Memory Stack Resistances App 20200350371 - Pellizzer; Fabio ;   et al. | 2020-11-05 |
Self-selecting Memory Cell With Dielectric Barrier App 20200321520 - Fratin; Lorenzo ;   et al. | 2020-10-08 |
Chalcogenide Memory Device Components And Composition App 20200321523 - Varesi; Enrico ;   et al. | 2020-10-08 |
Three-dimensional Memory Array App 20200303464 - Fantini; Paolo ;   et al. | 2020-09-24 |
Self-selecting Memory Array With Horizontal Access Lines App 20200243134 - Fratin; Lorenzo ;   et al. | 2020-07-30 |
Chalcogenide memory device components and composition Grant 10,727,405 - Varesi , et al. | 2020-07-28 |
Self-selecting memory cell with dielectric barrier Grant 10,720,579 - Fratin , et al. | 2020-07-21 |
Three-dimensional memory array Grant 10,700,128 - Fantini , et al. | 2020-06-30 |
Three-dimensional Memory Array App 20200203429 - Fantini; Paolo ;   et al. | 2020-06-25 |
Non-volatile memory cell structures including a chalcogenide material having a narrowed end and a three-dimensional memory device Grant 10,622,558 - Fratin , et al. | 2020-04-14 |
Self-selecting memory array with horizontal bit lines Grant 10,593,399 - Fratin , et al. | 2020-03-17 |
Three Dimensional Memory Arrays App 20200052035 - Pellizzer; Fabio ;   et al. | 2020-02-13 |
Self-selecting Memory Cell With Dielectric Barrier App 20200035917 - Fratin; Lorenzo ;   et al. | 2020-01-30 |
Three dimensional memory arrays Grant 10,490,602 - Pellizzer , et al. Nov | 2019-11-26 |
Apparatuses including multi-level memory cells and methods of operation of same Grant 10,446,226 - Tortorelli , et al. Oc | 2019-10-15 |
Apparatuses Including Multi-level Memory Cells And Methods Of Operation Of Same App 20190295636 - Tortorelli; Innocenzo ;   et al. | 2019-09-26 |
Self-selecting memory cell with dielectric barrier Grant 10,424,728 - Fratin , et al. Sept | 2019-09-24 |
Self-selecting Memory Array With Horizontal Access Lines App 20190287614 - Fratin; Lorenzo ;   et al. | 2019-09-19 |
Chalcogenide Memory Device Components And Composition App 20190115532 - Varesi; Enrico ;   et al. | 2019-04-18 |
Three Dimensional Memory Arrays App 20190088714 - Pellizzer; Fabio ;   et al. | 2019-03-21 |
Self-selecting Memory Cell With Dielectric Barrier App 20190067571 - Fratin; Lorenzo ;   et al. | 2019-02-28 |
Non-volatile Memory Structures And Devices App 20190044063 - Fratin; Lorenzo ;   et al. | 2019-02-07 |
Phase Change Memory Structures And Devices App 20190044060 - Russell; Stephen W. ;   et al. | 2019-02-07 |
Apparatuses Including Multi-level Memory Cells And Methods Of Operation Of Same App 20180040370 - Tortorelli; Innocenzo ;   et al. | 2018-02-08 |
Memory Arrays and Methods of Forming Memory Cells App 20150144864 - Pellizzer; Fabio ;   et al. | 2015-05-28 |
Memory arrays and methods of forming memory cells Grant 8,975,148 - Pellizzer , et al. March 10, 2 | 2015-03-10 |
Memory Arrays and Methods of Forming Memory Cells App 20130341587 - Pellizzer; Fabio ;   et al. | 2013-12-26 |
Memory arrays and methods of forming memory cells Grant 8,546,231 - Pellizzer , et al. October 1, 2 | 2013-10-01 |
Method Arrays and Methods of Forming Memory Cells App 20130126822 - Pellizzer; Fabio ;   et al. | 2013-05-23 |
Controlling the circuitry and memory array relative height in a phase change memory feol process flow Grant 8,154,006 - Mariani , et al. April 10, 2 | 2012-04-10 |
High-voltage-resistant MOS transistor, and corresponding manufacturing process Grant 5,977,591 - Fratin , et al. November 2, 1 | 1999-11-02 |
Method of making asymmetric nonvolatile memory cell Grant 5,920,776 - Fratin , et al. July 6, 1 | 1999-07-06 |
Method of producing MOSFET transistors by means of tilted implants Grant 5,915,185 - Fratin , et al. June 22, 1 | 1999-06-22 |
Nonvolatile memory cell and a method for forming the same Grant 5,712,814 - Fratin , et al. January 27, 1 | 1998-01-27 |
uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.
While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.
All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.