loadpatents
name:-0.042434930801392
name:-0.065555810928345
name:-0.013281106948853
FRANS; Yohan Patent Filings

FRANS; Yohan

Patent Applications and Registrations

Patent applications and USPTO patent grants for FRANS; Yohan.The latest application filed is for "frequency detector for clock data recovery".

Company Profile
10.41.26
  • FRANS; Yohan - Palo Alto CA
  • Frans, Yohan - Sunnyvale CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Frequency Detector For Clock Data Recovery
App 20220231889 - ZHANG; Hongtao ;   et al.
2022-07-21
Synchronous Wired-or Ack Status For Memory With Variable Write Latency
App 20220077327 - Frans; Yohan ;   et al.
2022-03-10
Frequency detector for clock data recovery
Grant 11,245,554 - Zhang , et al. February 8, 2
2022-02-08
Heterogeneous Integration Module Comprising Thermal Management Apparatus
App 20210305127 - REFAI-AHMED; Gamal ;   et al.
2021-09-30
Integrated electrical/optical interface with two-tiered packaging
Grant 11,107,770 - Ramalingam , et al. August 31, 2
2021-08-31
Synchronous wired-OR ACK status for memory with variable write latency
Grant 11,101,393 - Frans , et al. August 24, 2
2021-08-24
Memory Bandwidth Aggregation Using Simultaneous Access Of Stacked Semiconductor Memory Die
App 20210217448 - Frans; Yohan
2021-07-15
Inductor design in active 3D stacking technology
Grant 11,043,470 - Jing , et al. June 22, 2
2021-06-22
Method and system for correlation of a behavioral model to a circuit realization for a communications system
Grant 11,038,768 - Madrigal , et al. June 15, 2
2021-06-15
Inductor Design In Active 3d Stacking Technology
App 20210159212 - JING; Jing ;   et al.
2021-05-27
Temperature-locked loop for optical elements having a temperature-dependent response
Grant 11,005,572 - Chiang , et al. May 11, 2
2021-05-11
Memory bandwidth aggregation using simultaneous access of stacked semiconductor memory die
Grant 10,885,949 - Frans January 5, 2
2021-01-05
Flexible wide-range and high bandwidth auxiliary clock and data recovery (CDR) circuit for transceivers
Grant 10,868,663 - Turker Melek , et al. December 15, 2
2020-12-15
Apparatus and method to reduce lock time via frequency band calibration
Grant 10,812,089 - Leung , et al. October 20, 2
2020-10-20
Apparatus And Method To Reduce Lock Time Via Frequency Band Calibration
App 20200304130 - Leung; Caleb S. ;   et al.
2020-09-24
Method And Apparatus For A Phase Locked Loop Circuit
App 20200287551 - Raj; Mayank ;   et al.
2020-09-10
Method and apparatus for a phase locked loop circuit
Grant 10,749,532 - Raj , et al. A
2020-08-18
Clock phase aligner for high speed data serializers
Grant 10,712,770 - Chiang , et al.
2020-07-14
Quadrature clock correction circuit for transmitters
Grant 10,680,592 - Zhao , et al.
2020-06-09
Synchronous Wired-or Ack Status For Memory With Variable Write Latency
App 20200176617 - Frans; Yohan ;   et al.
2020-06-04
Thermal calibration of a ring modulator
Grant 10,651,933 - Chiang , et al.
2020-05-12
Memory Bandwidth Aggregation Using Simultaneous Access Of Stacked Semiconductor Memory Die
App 20200111514 - Frans; Yohan
2020-04-09
Digital-to-analog converter (DAC)-based driver for optical modulators
Grant 10,598,852 - Zhao , et al.
2020-03-24
High speed frequency divider
Grant 10,530,375 - Wang , et al. J
2020-01-07
Synchronous wired-OR ACK status for memory with variable write latency
Grant 10,468,544 - Frans , et al. No
2019-11-05
Memory bandwidth aggregation using simultaneous access of stacked semiconductor memory die
Grant 10,453,500 - Frans Oc
2019-10-22
Data receiver circuit and method of receiving data
Grant 10,404,445 - Zhang , et al. Sep
2019-09-03
ADC based receiver
Grant 10,367,666 - Zhang , et al. July 30, 2
2019-07-30
System and method for transmitter
Grant 10,348,290 - Zhang , et al. July 9, 2
2019-07-09
Quadrature Clock Correction Circuit For Transmitters
App 20190123728 - Zhao; Hai Bing ;   et al.
2019-04-25
Systems and methods for clock and data recovery
Grant 10,256,968 - Wu , et al.
2019-04-09
Adc Based Receiver
App 20180287837 - Zhang; Hongtao ;   et al.
2018-10-04
Memory Bandwidth Aggregation Using Simultaneous Access Of Stacked Semiconductor Memory Die
App 20180254073 - Frans; Yohan
2018-09-06
Impedance and swing control for voltage-mode driver
Grant 10,033,412 - Lim , et al. July 24, 2
2018-07-24
Electrically testing an optical receiver
Grant 9,960,844 - Raj , et al. May 1, 2
2018-05-01
Temporal change in data-crossing clock phase difference to resolve meta-stability in a clock and data recovery circuit
Grant 9,960,902 - Lin , et al. May 1, 2
2018-05-01
Impedance And Swing Control For Voltage-mode Driver
App 20180102797 - Lim; Siok Wei ;   et al.
2018-04-12
Memory bandwidth aggregation using simultaneous access of stacked semiconductor memory die
Grant 9,916,877 - Frans March 13, 2
2018-03-13
Impedance And Swing Control For Voltage-mode Driver
App 20180041232 - Lim; Siok Wei ;   et al.
2018-02-08
Impedance and swing control for voltage-mode driver
Grant 9,887,710 - Lim , et al. February 6, 2
2018-02-06
Resolving meta-stability in a clock and data recovery circuit
Grant 9,882,703 - Xu , et al. January 30, 2
2018-01-30
Synchronous Wired-or Ack Status For Memory With Variable Write Latency
App 20170147234 - Frans; Yohan ;   et al.
2017-05-25
Offset insensitive quadrature clock error correction and duty cycle calibration for high-speed clocking
Grant 9,602,082 - Hedayati , et al. March 21, 2
2017-03-21
Offset Insensitive Quadrature Clock Error Correction And Duty Cycle Calibration For High-speed Clocking
App 20170033774 - Hedayati; Hiva ;   et al.
2017-02-02
Synchronous wired-or ACK status for memory with variable write latency
Grant 9,515,204 - Frans , et al. December 6, 2
2016-12-06
Dynamic gain clock data recovery in a receiver
Grant 9,413,524 - Xu , et al. August 9, 2
2016-08-09
Clock recovery circuit
Grant 9,379,880 - Xu , et al. June 28, 2
2016-06-28
Clock data recovery (CDR) phase walk scheme in a phase-interpolater-based transceiver system
Grant 9,356,775 - Xu , et al. May 31, 2
2016-05-31
Memory Bandwidth Aggregation Using Simultaneous Access Of Stacked Semiconductor Memory Die
App 20160086642 - Frans; Yohan
2016-03-24
Memory bandwidth aggregation using simultaneous access of stacked semiconductor memory die
Grant 9,230,609 - Frans January 5, 2
2016-01-05
Fast locking CDR for burst mode
Grant 9,209,960 - Leung , et al. December 8, 2
2015-12-08
Time-to-digital conversion
Grant 8,884,804 - Majumdar , et al. November 11, 2
2014-11-11
Synchronous Wired-or Ack Status For Memory With Variable Write Latency
App 20140047158 - Frans; Yohan ;   et al.
2014-02-13
Memory Bandwidth Aggregation Using Simultaneous Access Of Stacked Semiconductor Memory Die
App 20130336039 - Frans; Yohan
2013-12-19
Clock-data recovery ("CDR") circuit, apparatus and method for variable frequency data
Grant 8,130,891 - Kim , et al. March 6, 2
2012-03-06
Clock-Data Recovery ("CDR") Circuit, Apparatus And Method For Variable Frequency Data
App 20100150290 - Kim; Dennis ;   et al.
2010-06-17
Clock-data recovery ("CDR") circuit, apparatus and method for variable frequency data
Grant 7,668,271 - Kim , et al. February 23, 2
2010-02-23
Leakage compensation for capacitors in loop filters
Grant 7,248,086 - Frans , et al. July 24, 2
2007-07-24
PLL lock detection circuit using edge detection and a state machine
Grant 7,084,681 - Green , et al. August 1, 2
2006-08-01
Compensator for leakage through loop filter capacitors in phase-locked loops
Grant 6,963,232 - Frans , et al. November 8, 2
2005-11-08
Leakage compensation for capacitors in loop filters
App 20050168292 - Frans, Yohan ;   et al.
2005-08-04
PLL lock detection circuit using edge detection and a state machine
App 20050162199 - Green, Michael ;   et al.
2005-07-28
PLL lock detection circuit using edge detection
Grant 6,879,195 - Green , et al. April 12, 2
2005-04-12
Clock-data recovery ("CDR") circuit, apparatus and method for variable frequency data
App 20050069071 - Kim, Dennis ;   et al.
2005-03-31
Compensator for leakage through loop filter capacitors in phase-locked loops
App 20050035797 - Frans, Yohan ;   et al.
2005-02-17
PLL lock detection circuit using edge detection
App 20050012524 - Green, Michael ;   et al.
2005-01-20

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