Fotland; David A.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Fotland; David A..The latest application filed is for "gesture detection management for an electronic device".

Company Profile

0.13.4

Fotland; David A. - San Jose CA
Fotland; David A - San Jose CA
Fotland, David A. - US

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Fingertip location determinations for gesture input Grant 9,690,384 - Noble , et al. June 27, 2	2017-06-27
Gesture detection management for an electronic device Grant 9,081,571 - Silva , et al. July 14, 2	2015-07-14
Gesture Detection Management For An Electronic Device App 20140149754 - Silva; Jennifer ; et al.	2014-05-29
Instruction-level multithreading according to a predetermined fixed schedule in an embedded processor using zero-time context switching Grant 7,925,869 - Kelsey , et al. April 12, 2	2011-04-12
Thread cancellation and recirculation in a computer processor for avoiding pipeline stalls Grant 7,822,950 - Fotland October 26, 2	2010-10-26
Fixed length memory to memory arithmetic and architecture for direct memory access using fixed length instructions Grant 7,546,442 - Fotland , et al. June 9, 2	2009-06-09
Software input/output using hard real time threads Grant 7,308,686 - Fotland , et al. December 11, 2	2007-12-11
System and method for reading and writing a thread state in a multithreaded central processing unit Grant 7,120,783 - Fotland , et al. October 10, 2	2006-10-10
System and method for instruction level multithreading scheduling in a embedded processor Grant 7,082,519 - Kelsey , et al. July 25, 2	2006-07-25
Fixed length memory to memory arithmetic and architecture for a communications embedded processor system Grant 7,047,396 - Fotland , et al. May 16, 2	2006-05-16
System and method for instruction level multithreading scheduling in a embedded processor App 20030037228 - Kelsey, Nicholas J. ; et al.	2003-02-20
Execution of an instruction to load two independently selected registers in a single cycle Grant 6,408,380 - Huck , et al. June 18, 2	2002-06-18
System and method for reading and writing a thread state in a multithreaded central processing unit App 20020038416 - Fotland, David A. ; et al.	2002-03-28
System and method for instruction level multithreading in an embedded processor using zero-time context switching App 20020002667 - Kelsey, Nicholas J. ; et al.	2002-01-03
Method and apparatus for generating and distributing clock signals with minimal skew Grant 5,987,576 - Johnson , et al. November 16, 1	1999-11-16
Method and means for conditional storing of data in a reduced instruction set computer Grant 4,873,627 - Baum , et al. * October 10, 1	1989-10-10
Mechanism for comparing two registers and storing the result in a general purpose register without requiring a branch Grant 4,747,046 - Baum , et al. May 24, 1	1988-05-24

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.