Patent | Date |
---|
Low energy consumption mantissa multiplication for floating point multiply-add operations Grant 10,402,168 - Hasenplaugh , et al. Sep | 2019-09-03 |
Low Energy Consumption Mantissa Multiplication For Floating Point Multiply-add Operations App 20180095728 - Hasenplaugh; William C. ;   et al. | 2018-04-05 |
Hardware compilation and/or translation with fault detection and roll back functionality Grant 9,317,263 - Chee , et al. April 19, 2 | 2016-04-19 |
Scalable multi-layer 2D-mesh routers Grant 9,294,419 - Hasenplaugh , et al. March 22, 2 | 2016-03-22 |
Distributed power management for multi-core processors Grant 9,250,682 - Hasenplaugh , et al. February 2, 2 | 2016-02-02 |
Hardware Compilation And/or Translation With Fault Detection And Roll Back Functionality App 20150046910 - Chee; Nicholas Cheng Hwa ;   et al. | 2015-02-12 |
Scalable Multi-layer 2d-mesh Routers App 20150003281 - Hasenplaugh; William C. ;   et al. | 2015-01-01 |
Apparatus and method for heterogeneous chip multiprocessors via resource allocation and restriction Grant 08924690 - | 2014-12-30 |
Apparatus and method for heterogeneous chip multiprocessors via resource allocation and restriction Grant 8,924,690 - Fossum , et al. December 30, 2 | 2014-12-30 |
Hardware compilation and/or translation with fault detection and roll back functionality Grant 8,893,094 - Chee , et al. November 18, 2 | 2014-11-18 |
Priority based throttling for power/performance quality of service Grant 8,799,902 - Illikkal , et al. August 5, 2 | 2014-08-05 |
Distributed Power Management For Multi-core Processors App 20140189413 - Hasenplaugh; William C. ;   et al. | 2014-07-03 |
Technique for controlling computing resources Grant 8,769,201 - Hasenplaugh , et al. July 1, 2 | 2014-07-01 |
Hardware Compilation And/or Translation With Fault Detection And Roll Back Functionality App 20130173893 - Hwa Chee; Nicholas Cheng ;   et al. | 2013-07-04 |
Method And System To Improve Unaligned Cache Memory Accesses App 20120246407 - HASENPLAUGH; WILLIAM C. ;   et al. | 2012-09-27 |
Apparatus And Method For Heterogeneous Chip Multiprocessors Via Resource Allocation And Restriction App 20120239875 - Fossum; Tryggve ;   et al. | 2012-09-20 |
Shared cache performance Grant 8,244,980 - Fossum August 14, 2 | 2012-08-14 |
Apparatus and method for heterogeneous chip multiprocessors via resource allocation and restriction Grant 8,190,863 - Fossum , et al. May 29, 2 | 2012-05-29 |
Method, system, and apparatus for improving multi-core processor performance Grant 7,788,519 - Bailey , et al. August 31, 2 | 2010-08-31 |
Technique for controlling computing resources App 20100138609 - Hasenplaugh; William ;   et al. | 2010-06-03 |
Priority based throttling for power/performance Quality of Service App 20080250415 - Illikkal; Ramesh Kumar ;   et al. | 2008-10-09 |
Method, system, and apparatus for improving multi-core processor performance Grant 7,392,414 - Bailey , et al. June 24, 2 | 2008-06-24 |
Method, system, and apparatus for improving multi-core processor performance Grant 7,389,440 - Bailey , et al. June 17, 2 | 2008-06-17 |
Converting merge buffer system-kill errors to process-kill errors Grant 7,380,169 - Fossum , et al. May 27, 2 | 2008-05-27 |
Method of handling errors Grant 7,370,231 - Fossum , et al. May 6, 2 | 2008-05-06 |
Shared cache performance App 20070300016 - Fossum; Tryggve | 2007-12-27 |
Method, System, And Apparatus For Improving Multi-core Processor Performance App 20070198872 - Bailey; Daniel W. ;   et al. | 2007-08-23 |
Multicore processor having active and inactive execution cores App 20060212677 - Fossum; Tryggve | 2006-09-21 |
Method of handling errors App 20060156153 - Fossum; Tryggve ;   et al. | 2006-07-13 |
Method, system, and apparatus for improving multi-core processor performance App 20060123263 - Bailey; Daniel W. ;   et al. | 2006-06-08 |
Method, system, and apparatus for improving multi-core processor performance App 20060123264 - Bailey; Daniel W. ;   et al. | 2006-06-08 |
Method, system, and apparatus for improving multi-core processor performance App 20060117199 - Bailey; Daniel W. ;   et al. | 2006-06-01 |
Converting merge buffer system-kill errors to process-kill errors App 20060075301 - Fossum; Tryggve ;   et al. | 2006-04-06 |
Apparatus and method for heterogeneous chip multiprocessors via resource allocation and restriction App 20060005082 - Fossum; Tryggve ;   et al. | 2006-01-05 |
Method, system, and apparatus for improving multi-core processor performance App 20050050310 - Bailey, Daniel W. ;   et al. | 2005-03-03 |
Method and apparatus to quiesce a portion of a simultaneous multithreaded central processing unit App 20040073905 - Emer, Joel S. ;   et al. | 2004-04-15 |
Temporary halting of thread execution until monitoring of armed events to memory location identified in working registers Grant 6,675,192 - Emer , et al. January 6, 2 | 2004-01-06 |
Method and apparatus to quiesce a portion of a simultaneous multithreaded central processing unit App 20030105944 - Emer, Joel S. ;   et al. | 2003-06-05 |
Method and apparatus to quiesce a portion of a simultaneous multithreaded central processing unit Grant 6,493,741 - Emer , et al. December 10, 2 | 2002-12-10 |
Apparatus and method for intelligent multiple-probe cache allocation Grant 5,829,051 - Steely, Jr. , et al. October 27, 1 | 1998-10-27 |
System for translation of virtual to physical addresses by operating memory management processor for calculating location of physical address in memory concurrently with cache comparing virtual addresses for translation Grant 5,349,651 - Hetherington , et al. September 20, 1 | 1994-09-20 |
Integrated circuit chip having primary and secondary random access memories for a hierarchical cache Grant 5,285,323 - Hetherington , et al. February 8, 1 | 1994-02-08 |
Method and apparatus for ordering and queueing multiple memory requests Grant 5,222,223 - Webb, Jr. , et al. June 22, 1 | 1993-06-22 |
Scheme for insuring data consistency between a plurality of cache memories and the main memory in a multi-processor system Grant 5,222,224 - Flynn , et al. June 22, 1 | 1993-06-22 |
Synchronizing and processing of memory access operations in multiprocessor systems using a directory of lock bits Grant 5,175,837 - Arnold , et al. December 29, 1 | 1992-12-29 |
Memory device for storing vector registers Grant 5,168,573 - Fossum , et al. December 1, 1 | 1992-12-01 |
System for arbitrating communication requests using multi-pass control unit based on availability of system resources Grant 5,155,854 - Flynn , et al. October 13, 1 | 1992-10-13 |
Method and apparatus for simultaneously decoding three operands in a variable length instruction when one of the operands is also of variable length Grant 5,148,528 - Fite , et al. September 15, 1 | 1992-09-15 |
Branch prediction Grant 5,142,634 - Fite , et al. August 25, 1 | 1992-08-25 |
System for queuing individual read or write mask and generating respective composite mask for controlling access to general purpose register Grant 5,142,631 - Murray , et al. August 25, 1 | 1992-08-25 |
Method and apparatus for resolving a variable number of potential memory access conflicts in a pipelined computer system Grant 5,125,083 - Fite , et al. June 23, 1 | 1992-06-23 |
Method and apparatus for handling faults of vector instructions causing memory management exceptions Grant 5,113,521 - McKeen , et al. May 12, 1 | 1992-05-12 |
Method and apparatus using a source operand list and a source operand pointer queue between the execution unit and the instruction decoding and operand processing units of a pipelined data processor Grant 5,109,495 - Fite , et al. April 28, 1 | 1992-04-28 |
Control of multiple functional units with parallel operation in a microcoded execution unit Grant 5,067,069 - Fite , et al. November 19, 1 | 1991-11-19 |
Pipelined floating point adder for digital computer Grant 4,994,996 - Fossum , et al. February 19, 1 | 1991-02-19 |
Write back buffer with error correcting capabilities Grant 4,995,041 - Hetherington , et al. February 19, 1 | 1991-02-19 |
System for delaying processing of memory access exceptions until the execution stage of an instruction pipeline of a virtual memory system based digital computer Grant 4,985,825 - Webb, Jr. , et al. January 15, 1 | 1991-01-15 |
Method and apparatus for detecting and correcting errors in a pipelined computer system Grant 4,982,402 - Beaven , et al. January 1, 1 | 1991-01-01 |
Vector register system for executing plural read/write commands concurrently and independently routing data to plural read/write ports Grant 4,980,817 - Fossum , et al. December 25, 1 | 1990-12-25 |
Method and apparatus for executing instructions for a vector processing system Grant 4,949,250 - Bhandarkar , et al. August 14, 1 | 1990-08-14 |
Method and apparatus using a cache and main memory for both vector processing and scalar processing by prefetching cache blocks including vector data elements Grant 4,888,679 - Fossum , et al. December 19, 1 | 1989-12-19 |
Instruction prefetch system for conditional branch instruction for central processor unit Grant 4,742,451 - Bruckert , et al. May 3, 1 | 1988-05-03 |
Method and apparatus for self-testing of floating point accelerator processors Grant 4,583,222 - Fossum , et al. April 15, 1 | 1986-04-15 |