Foss; Richard C.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Foss; Richard C..The latest application filed is for "delay locked loop implementation in a synchronous dynamic random access memory".

Company Profile

0.36.26

Foss; Richard C. - Calabogie CA
Foss; Richard C. - Scotland GB
Foss; Richard C. - Kirkcaldy Fife GB
Foss; Richard C. - Calabogie Lake CA
Foss; Richard C. - Kirkaldy Fife GB
Foss, Richard C. - Kanata CA
Foss; Richard C. - Kirkcaldy GB6
Foss; Richard C. - Ontario CA
Foss; Richard C. - Ottawa CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Delay Locked Loop Implementation In A Synchronous Dynamic Random Access Memory App 20140104969 - Foss; Richard C. ; et al.	2014-04-17
Delay locked loop implementation in a synchronous dynamic random access memory Grant 8,638,638 - Foss , et al. January 28, 2	2014-01-28
Delay Locked Loop Implementation In A Synchronous Dynamic Random Access Memory App 20130121096 - Foss; Richard C. ; et al.	2013-05-16
Embedded memory databus architecture Grant 8,441,878 - Foss May 14, 2	2013-05-14
Embedded Memory Databus Architecture App 20130003478 - Foss; Richard C.	2013-01-03
Embedded memory databus architecture Grant 8,218,386 - Foss July 10, 2	2012-07-10
Embedded Memory Databus Architecture App 20110211409 - Foss; Richard C.	2011-09-01
Embedded memory databus architecture Grant 7,859,930 - Foss December 28, 2	2010-12-28
Embedded Memory Databus Architecture App 20100128546 - Foss; Richard C.	2010-05-27
Delay Locked Loop Implementation in a Synchronous Dynamic Random Access Memory App 20090316514 - Foss; Richard C. ; et al.	2009-12-24
Embedded memory databus architecture Grant 7,609,573 - Foss October 27, 2	2009-10-27
Delay locked loop implementation in a synchronous dynamic random access memory Grant 7,599,246 - Foss , et al. October 6, 2	2009-10-06
Wide databus architecture App 20090073792 - Foss; Richard C.	2009-03-19
Wide databus architecture Grant 7,486,580 - Foss February 3, 2	2009-02-03
Dynamic random access memory using imperfect isolating transistors Grant RE40,552 - Foss , et al. October 28, 2	2008-10-28
Error Correction Scheme For Memory App 20070300100 - FOSS; Richard C.	2007-12-27
DRAM boosted voltage supply App 20070200611 - Foss; Richard C. ; et al.	2007-08-30
Wide databus architecture App 20070047356 - Foss; Richard C.	2007-03-01
Wide databus architecture Grant 7,095,666 - Foss August 22, 2	2006-08-22
DRAM boosted voltage supply App 20060028899 - Foss; Richard C. ; et al.	2006-02-09
Delay locked loop implementation in a synchronous dynamic random access memory Grant 6,992,950 - Foss , et al. January 31, 2	2006-01-31
DRAM boosted voltage supply Grant 6,980,448 - Foss , et al. December 27, 2	2005-12-27
Delay locked loop implementation in a synchronous dynamic random access memory App 20050265506 - Foss, Richard C. ; et al.	2005-12-01
Wide databus architecture App 20040136226 - Foss, Richard C.	2004-07-15
Delayed locked loop implementation in a synchronous dynamic random access memory App 20040130962 - Foss, Richard C. ; et al.	2004-07-08
Error correction scheme for memory App 20040117723 - Foss, Richard C.	2004-06-17
High density memory cell Grant 6,751,111 - Foss , et al. June 15, 2	2004-06-15
Boosted voltage supply App 20040036456 - Foss, Richard C. ; et al.	2004-02-26
Wide databus architecture Grant 6,661,723 - Foss December 9, 2	2003-12-09
Delayed locked loop implementation in a synchronous dynamic random access memory Grant 6,657,918 - Foss , et al. December 2, 2	2003-12-02
Delayed locked loop implementation in a synchronous dynamic random access memory Grant 6,657,919 - Foss , et al. December 2, 2	2003-12-02
Dynamic random access memory boosted voltage supply Grant 6,614,705 - Foss , et al. September 2, 2	2003-09-02
Wide databus architecture App 20030133347 - Foss, Richard C.	2003-07-17
Delayed locked loop implementation in a synchronous dynamic random access memory App 20030107944 - Foss, Richard C. ; et al.	2003-06-12
Delayed locked loop implementation in a synchronous dynamic random access memory App 20030090952 - Foss, Richard C. ; et al.	2003-05-15
Priority Encoder Circuit And Method For Content Addressable Memory App 20030081481 - Foss, Richard C. ; et al.	2003-05-01
High density memory cell App 20030035331 - Foss, Richard C. ; et al.	2003-02-20
Delayed locked loop implementation in a synchronous dynamic random access memory App 20020075747 - Foss, Richard C. ; et al.	2002-06-20
Boosted voltage supply App 20020075706 - Foss, Richard C. ; et al.	2002-06-20
Wide databus architecture App 20020067635 - Foss, Richard C.	2002-06-06
Delayed locked loop implementation in a synchronous dynamic random access memory Grant 6,314,052 - Foss , et al. November 6, 2	2001-11-06
High voltage boosted word line supply charge pump and regulator for dram App 20010009518 - Foss, Richard C. ; et al.	2001-07-26
Delayed locked loop implementation in a synchronous dynamic random access memory App 20010001601 - Foss, Richard C. ; et al.	2001-05-24
High voltage boosted word line supply charge pump and regulator for DRAM Grant 6,236,581 - Foss , et al. May 22, 2	2001-05-22
Delayed locked loop implementation in a synchronous dynamic random access memory Grant 6,205,083 - Foss , et al. March 20, 2	2001-03-20
Delayed locked loop implementation in a synchronous dynamic random access memory Grant 6,067,272 - Foss , et al. May 23, 2	2000-05-23
Enhanced ASIC process cell Grant 5,870,329 - Foss February 9, 1	1999-02-09
Delay locked loop implementation in a synchronous dynamic random access memory Grant 5,796,673 - Foss , et al. August 18, 1	1998-08-18
Wide databus architecture Grant 5,742,544 - Foss April 21, 1	1998-04-21
High voltage boosted word line supply charge pump and regulator for dram Grant 5,699,313 - Foss , et al. December 16, 1	1997-12-16
Repeater with threshold modulation Grant 5,576,649 - Foss November 19, 1	1996-11-19
Flip-flop circuit having low standby power for driving synchronous dynamic random access memory Grant 5,497,115 - Millar , et al. March 5, 1	1996-03-05
Dynamic random access memory using imperfect isolating transistors Grant 5,414,662 - Foss , et al. May 9, 1	1995-05-09
High voltage boosted word line supply charge pump and regulator for DRAM Grant 5,406,523 - Foss , et al. April 11, 1	1995-04-11
High voltage boosted word line supply charge pump regulator for DRAM Grant 5,267,201 - Foss , et al. November 30, 1	1993-11-30
Dynamic memory row/column redundancy scheme Grant 5,245,576 - Foss , et al. September 14, 1	1993-09-14
Folded bitline dynamic ram with reduced shared supply voltages Grant 4,980,862 - Foss December 25, 1	1990-12-25
Output buffer having sequentially-switched output Grant 4,789,796 - Foss December 6, 1	1988-12-06
Dynamic logic circuits operating in a differential mode for array processing Grant 4,367,420 - Foss , et al. January 4, 1	1983-01-04
Threshold Circuit For Tone-ringer Grant 3,772,470 - Cowpland , et al. November 13, 1	1973-11-13
Bi-directional Amplifying Bus-switch Grant 3,769,525 - Foss , et al. October 30, 1	1973-10-30