Foo; Pang Dow
Patent Applications and Registrations
Patent applications and USPTO patent grants for Foo; Pang Dow.The latest application filed is for "apparatus and process for bulk wet etch with leakage protection".
- Foo; Pang Dow - Singapore SG
- Foo; Pang-Dow - Berkeley Heights NJ
| Patent | Date |
|---|---|
| Method of making an integrated circuit inductor wherein a plurality of apertures are formed beneath an inductive loop Grant 6,908,825 - Xu , et al. June 21, 2 | 2005-06-21 |
| Apparatus and process for bulk wet etch with leakage protection App 20050118822 - Wang, Zhe ; et al. | 2005-06-02 |
| Apparatus and process for bulk wet etch with leakage protection Grant 6,855,640 - Wang , et al. February 15, 2 | 2005-02-15 |
| Micro-relay Grant 6,765,300 - Wagenaar , et al. July 20, 2 | 2004-07-20 |
| Method for reducing dishing in chemical mechanical polishing Grant 6,670,272 - Wu , et al. December 30, 2 | 2003-12-30 |
| RF LDMOS on partial SOI substrate Grant 6,667,516 - Xu , et al. December 23, 2 | 2003-12-23 |
| Stacked LDD high frequency LDMOSFET Grant 6,664,596 - Cai , et al. December 16, 2 | 2003-12-16 |
| Apparatus and process for bulk wet etch with leakage protection App 20030160022 - Wang, Zhe ; et al. | 2003-08-28 |
| Stacked LDD high frequency LDMOSFET App 20030085448 - Cai, Jun ; et al. | 2003-05-08 |
| Method of making an integrated circuit inductor App 20030071325 - Xu, Shuming ; et al. | 2003-04-17 |
| Method for reducing dishing in chemical mechanical polishing App 20030054649 - Wu, Shaoyu ; et al. | 2003-03-20 |
| Method for preventing photoresist poisoning in semiconductor fabrication App 20030040174 - Tan, Cher Huan ; et al. | 2003-02-27 |
| Room temperature wafer-to-wafer bonding by polydimethylsiloxane Grant 6,503,847 - Chen , et al. January 7, 2 | 2003-01-07 |
| RF LDMOS on partial SOI substrate App 20020197774 - Xu, Shuming ; et al. | 2002-12-26 |
| Stacked LDD high frequency LDMOSFET App 20020164844 - Cai, Jun ; et al. | 2002-11-07 |
| Room temperature wafer-to-wafer bonding by polydimethylsiloxane App 20020160582 - Chen, Yu ; et al. | 2002-10-31 |
| RF LDMOS on partial SOI substrate Grant 6,461,902 - Xu , et al. October 8, 2 | 2002-10-08 |
| Bi-layer resist process for dual damascene Grant 6,436,810 - Kumar , et al. August 20, 2 | 2002-08-20 |
| Semiconductor device App 20020017682 - Xu, Shuming ; et al. | 2002-02-14 |
| Integrated circuit inductor App 20010045617 - Xu, Shuming ; et al. | 2001-11-29 |
| Low temperature deposition of silicon oxides for device fabrication Grant 5,643,838 - Dean , et al. July 1, 1 | 1997-07-01 |
| Process for fabricating integrating circuits Grant 5,616,518 - Foo , et al. April 1, 1 | 1997-04-01 |
| Method of forming oxide layers by bias ECR plasma deposition Grant 5,124,014 - Foo , et al. * June 23, 1 | 1992-06-23 |
| Method for depositing dielectric layers Grant 5,120,680 - Foo , et al. June 9, 1 | 1992-06-09 |
| Selective etching process Grant 4,871,420 - Alexander, Jr. , et al. October 3, 1 | 1989-10-03 |
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