loadpatents
name:-0.0024940967559814
name:-0.011362075805664
name:-0.00052785873413086
Flanner; Janet M. Patent Filings

Flanner; Janet M.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Flanner; Janet M..The latest application filed is for "electronically diagnosing a component in a process line using a substrate signature".

Company Profile
0.14.4
  • Flanner; Janet M. - Union City CA
  • Flanner, Janet M - Union City CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Electronically diagnosing a component in a process line using a substrate signature
Grant 6,946,303 - Flanner , et al. September 20, 2
2005-09-20
System and method for creating a substrate signature
Grant 6,890,774 - Flanner , et al. May 10, 2
2005-05-10
System and method for creating a substrate signature
App 20040110312 - Flanner, Janet M. ;   et al.
2004-06-10
Electronically diagnosing a component in a process line using a substrate signature
App 20040110311 - Flanner, Janet M. ;   et al.
2004-06-10
Technique for etching a low capacitance dielectric layer
Grant 6,696,366 - Morey , et al. February 24, 2
2004-02-24
Convertible hot edge ring to improve low-K dielectric etch
Grant 6,653,734 - Flanner , et al. November 25, 2
2003-11-25
Convertible hot edge ring to improve low-K dielectric etch
App 20030045101 - Flanner, Janet M. ;   et al.
2003-03-06
Post etch photoresist strip with hydrogen for organosilicate glass low-.kappa. etch applications
Grant 6,426,304 - Chien , et al. July 30, 2
2002-07-30
Method for etching dual damascene structures in organosilicate glass
Grant 6,410,437 - Flanner , et al. June 25, 2
2002-06-25
Convertible hot edge ring to improve low-K dielectric etch
Grant 6,383,931 - Flanner , et al. May 7, 2
2002-05-07
Convertible hot edge ring to improve low-k dielectric etch
App 20020022281 - Flanner, Janet M ;   et al.
2002-02-21
Apparatus for reducing process drift in inductive coupled plasma etching such as oxide layer
Grant 6,241,845 - Gadgil , et al. June 5, 2
2001-06-05
Self-aligned contacts for semiconductor device
Grant 6,165,910 - Flanner , et al. December 26, 2
2000-12-26
Techniques for etching a low capacitance dielectric layer on a substrate
Grant 6,114,250 - Ellingboe , et al. September 5, 2
2000-09-05
Apparatus for reducing process drift in inductive coupled plasma etching such as oxide layer
Grant 6,048,798 - Gadgil , et al. April 11, 2
2000-04-11
Methods and apparatus for etching self-aligned contacts
Grant 5,783,496 - Flanner , et al. July 21, 1
1998-07-21
Semiconductor fabrication process using sacrificial oxidation to reduce tunnel formation during tungsten deposition
Grant 5,021,358 - Flanner , et al. June 4, 1
1991-06-04
Self-aligned metallization for semiconductor device and process using selectively deposited tungsten
Grant 4,822,749 - Flanner , et al. April 18, 1
1989-04-18

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