loadpatents
name:-0.003032922744751
name:-0.018112897872925
name:-0.00054407119750977
Fitzpatrick; Mark E. Patent Filings

Fitzpatrick; Mark E.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Fitzpatrick; Mark E..The latest application filed is for "health information gathering system".

Company Profile
0.17.1
  • Fitzpatrick; Mark E. - Oklahoma City OK
  • Fitzpatrick; Mark E. - San Jose CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Health information gathering system
Grant 8,738,392 - Fitzpatrick , et al. May 27, 2
2014-05-27
Health information gathering system
App 20030097280 - Fitzpatrick, Constance Y. ;   et al.
2003-05-22
Logic array having high frequency internal clocking
Grant RE35,797 - Graham , et al. May 19, 1
1998-05-19
Current mirror compensation circuit
Grant 5,212,458 - Fitzpatrick , et al. May 18, 1
1993-05-18
Logic array having high frequency internal clocking
Grant 5,204,555 - Graham , et al. April 20, 1
1993-04-20
Phase-locked loop with clamped voltage-controlled oscillator
Grant 5,072,195 - Graham , et al. December 10, 1
1991-12-10
Circuit for generating reference voltage and reference current
Grant 4,978,904 - Fitzpatrick , et al. December 18, 1
1990-12-18
Resettable latch circuit
Grant 4,970,406 - Fitzpatrick , et al. November 13, 1
1990-11-13
Capacitor coupled push pull logic circuit
Grant 4,918,336 - Graham , et al. * April 17, 1
1990-04-17
Semiconductor fuse programmable array structure
Grant 4,910,418 - Graham , et al. March 20, 1
1990-03-20
Programmable connection path circuit
Grant 4,897,836 - Fitzpatrick , et al. January 30, 1
1990-01-30
FET constant reference voltage generator
Grant 4,868,416 - Fitzpatrick , et al. September 19, 1
1989-09-19
TTL compatible output buffer
Grant 4,800,303 - Graham , et al. January 24, 1
1989-01-24
TTL compatible input buffer
Grant 4,791,322 - Graham , et al. December 13, 1
1988-12-13
Programmable synchronous sequential state machine or sequencer having decision variable input mapping circuit responsive to feedback signals
Grant 4,755,967 - Gabris , et al. July 5, 1
1988-07-05
Output circuit for a programmable logic array
Grant 4,684,830 - Tsui , et al. August 4, 1
1987-08-04
Programmable array logic circuit with testing and verification circuitry
Grant 4,625,311 - Fitzpatrick , et al. November 25, 1
1986-11-25

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