| Patent | Date |
|---|
Method Of Manufacturing Microelectronic Components
App 20220068724 - NEMOUCHI; Fabrice ; et al. | 2022-03-03 |
Transistor Element With Gate Electrode Of Reduced Height And Raised Drain And Source Regions And Method Of Fabricating The Same
App 20190043963 - Baars; Peter ; et al. | 2019-02-07 |
Aqua regia and hydrogen peroxide HCL combination to remove Ni and NiPt residues
Grant 9,399,753 - Duong , et al. July 26, 2 | 2016-07-26 |
Gate silicidation
Grant 9,034,746 - Patzer , et al. May 19, 2 | 2015-05-19 |
Aqua Regia and Hydrogen Peroxide HCl Combination to Remove Ni and NiPt Residues
App 20150105308 - Duong; Anh ; et al. | 2015-04-16 |
Gate Silicidation
App 20150044861 - Patzer; Joachim ; et al. | 2015-02-12 |
Aqua regia and hydrogen peroxide HCI combination to remove Ni and NiPt residues
Grant 8,946,015 - Duong , et al. February 3, 2 | 2015-02-03 |
Reducing voids caused by trapped acid on a dielectric surface
App 20150017456 - Duong; Anh ; et al. | 2015-01-15 |
Aqua Regia and Hydrogen Peroxide HCl Combination to Remove Ni and NiPt Residues
App 20140363944 - Duong; Anh ; et al. | 2014-12-11 |
Gate silicidation
Grant 8,906,794 - Patzer , et al. December 9, 2 | 2014-12-09 |
Stabilized metal silicides in silicon-germanium regions of transistor elements
Grant 8,859,408 - Flachowsky , et al. October 14, 2 | 2014-10-14 |
NiSi rework procedure to remove platinum residuals
Grant 8,835,298 - Kumarasamy , et al. September 16, 2 | 2014-09-16 |
HNO.sub.3 single wafer clean process to strip nickel and for MOL post etch
Grant 8,835,318 - Fitz , et al. September 16, 2 | 2014-09-16 |
Microwave-assisted Heating Of Strong Acid Solution To Remove Nickel Platinum/platinum Residues
App 20140248770 - FITZ; Clemens ; et al. | 2014-09-04 |
Methods of forming metal silicide regions on semiconductor devices using different temperatures
Grant 8,815,736 - Scheiper , et al. August 26, 2 | 2014-08-26 |
Aqua regia and hydrogen peroxide HCl combination to remove Ni and NiPt residues
Grant 8,809,140 - Duong , et al. August 19, 2 | 2014-08-19 |
Methods of forming metal silicide regions on semiconductor devices
Grant 8,765,586 - Fitz , et al. July 1, 2 | 2014-07-01 |
Method and apparatus for characterizing discontinuities in semiconductor devices
Grant 8,761,489 - Rinderknecht , et al. June 24, 2 | 2014-06-24 |
Aqua Regia and Hydrogen Peroxide HCl Combination to Remove Ni and NiPt Residues
App 20130323890 - Duong; Anh ; et al. | 2013-12-05 |
Nisi Rework Procedure To Remove Platinum Residuals
App 20130234213 - KUMARASAMY; Sivakumar ; et al. | 2013-09-12 |
Hno3 Single Wafer Clean Process To Strip Nickel And For Mol Post Etch
App 20130234335 - Fitz; Clemens ; et al. | 2013-09-12 |
Aqua regia and hydrogen peroxide HCl combination to remove Ni and NiPt residues
Grant 8,518,765 - Duong , et al. August 27, 2 | 2013-08-27 |
Process to remove Ni and Pt residues for NiPtSi applications
Grant 8,513,117 - Duong , et al. August 20, 2 | 2013-08-20 |
Methods of Forming Metal Silicide Regions on Semiconductor Devices
App 20130157450 - Fitz; Clemens ; et al. | 2013-06-20 |
PROCESS TO REMOVE Ni AND Pt RESIDUES FOR NiPtSi APPLICATIONS
App 20130122671 - Duong; Anh ; et al. | 2013-05-16 |
Method And Apparatus For Characterizing Discontinuities In Semiconductor Devices
App 20130058559 - Rinderknecht; Jochen ; et al. | 2013-03-07 |
Methods of Forming Metal Silicide Regions on Semiconductor Devices Using Different Temperatures
App 20130052819 - Scheiper; Thilo ; et al. | 2013-02-28 |
Mosfet Integrated Circuit With Improved Silicide Thickness Uniformity And Methods For Its Manufacture
App 20130049124 - Fitz; Clemens ; et al. | 2013-02-28 |
Methods for fabricating a CMOS integrated circuit having a dual stress layer (DSL)
Grant 8,293,605 - Baars , et al. October 23, 2 | 2012-10-23 |
Stabilized Metal Silicides in Silicon-Germanium Regions of Transistor Elements
App 20120261725 - Flachowsky; Stefan ; et al. | 2012-10-18 |
Methods For Fabricating A Cmos Integrated Circuit Having A Dual Stress Layer (dsl)
App 20120220086 - Baars; Peter ; et al. | 2012-08-30 |
Integrated circuit with a contact structure including a portion arranged in a cavity of a semiconductor structure
Grant 8,008,729 - Graf , et al. August 30, 2 | 2011-08-30 |
Integrated Circuit with a Contact Structure Including a Portion Arranged in a Cavity of a Semiconductor Structure
App 20100090285 - Graf; Werner ; et al. | 2010-04-15 |
Buried bitline with reduced resistance
Grant 7,678,654 - Kleint , et al. March 16, 2 | 2010-03-16 |
Method of removing refractory metal layers and of siliciding contact areas
Grant 7,679,149 - Beckert , et al. March 16, 2 | 2010-03-16 |
Layer Stack Including A Tungsten Layer
App 20090236682 - Boubekeur; Hocine ; et al. | 2009-09-24 |
Method of Fabricating an Integrated Circuit
App 20090057810 - Verdugo; Victor ; et al. | 2009-03-05 |
Fabrication method for an integrated circuit structure
App 20080124920 - Fitz; Clemens ; et al. | 2008-05-29 |
Method of Removing Refractory Metal Layers and of Siliciding Contact Areas
App 20080029835 - Beckert; Audrey ; et al. | 2008-02-07 |
Buried bitline with reduced resistance
App 20080002466 - Kleint; Christoph ; et al. | 2008-01-03 |
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