Fister; Wallace E.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Fister; Wallace E..The latest application filed is for "system and method for reducing pin-count of memory devices, and memory device testers for same".

Company Profile

0.5.4

Fister; Wallace E. - Meridian ID
Fister; Wallace E. - Boise ID

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
System and method for reducing pin-count of memory devices, and memory device testers for same Grant 8,687,435 - Gatzemeier , et al. April 1, 2	2014-04-01
System And Method For Reducing Pin-count Of Memory Devices, And Memory Device Testers For Same App 20130229878 - Gatzemeier; Scott N. ; et al.	2013-09-05
Apparatus and method for parallel programming of antifuses Grant 6,839,292 - Gatzemeier , et al. January 4, 2	2005-01-04
Apparatus and method for parallel programming of antifuses App 20030112693 - Gatzemeier, Scott N. ; et al.	2003-06-19
Method and apparatus for generating memory addresses for testing memory devices App 20020075749 - Fister, Wallace E.	2002-06-20
Method and apparatus for generating memory addresses for testing memory devices App 20020067646 - Fister, Wallace E.	2002-06-06
Method and apparatus for testing memory devices Grant 6,115,303 - Fister September 5, 2	2000-09-05
Method and apparatus for generating memory addresses for testing memory devices Grant 6,049,505 - Fister April 11, 2	2000-04-11
Method and apparatus for memory array compressed data testing Grant 5,935,263 - Keeth , et al. August 10, 1	1999-08-10

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