Fiscus; Timothy E.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Fiscus; Timothy E..The latest application filed is for "proportional to temperature voltage generator".

Company Profile

0.12.6

Fiscus; Timothy E. - South Burlington VT
Fiscus; Timothy E. - Chandler AZ

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method and architecture for reducing the power consumption for memory devices in refresh operations Grant 7,057,960 - Fiscus , et al. June 6, 2	2006-06-06
Proportional to temperature voltage generator Grant 6,901,022 - Fiscus May 31, 2	2005-05-31
Method and architecture for self-clocking digital delay locked loop Grant 6,731,147 - Fiscus May 4, 2	2004-05-04
Method and architecture for refreshing a 1T memory proportional to temperature Grant 6,714,473 - Fiscus March 30, 2	2004-03-30
Method for guaranteeing a minimum data strobe valid window and a minimum data valid window for DDR memory devices Grant 6,708,298 - Corbin, Jr. , et al. March 16, 2	2004-03-16
Method for testing and guaranteeing that skew between two signals meets predetermined criteria Grant 6,658,604 - Corbin , et al. December 2, 2	2003-12-02
Proportional to temperature voltage generator App 20030198114 - Fiscus, Timothy E.	2003-10-23
Digitally controlled analog delay locked loop (DLL) Grant 6,628,154 - Fiscus September 30, 2	2003-09-30
Proportional to temperature voltage generator Grant 6,628,558 - Fiscus September 30, 2	2003-09-30
Method and architecture for reducing the power consumption for memory devices in refresh operations Grant 6,618,314 - Fiscus , et al. September 9, 2	2003-09-09
Method and architecture for self-clocking digital delay locked loop App 20030080791 - Fiscus, Timothy E.	2003-05-01
Data and data strobe circuits and operating protocol for double data rate memories Grant 6,529,993 - Rogers , et al. March 4, 2	2003-03-04
Digitally controlled analog delay locked loop (DLL) App 20030025539 - Fiscus, Timothy E.	2003-02-06
Proportional to temperature voltage generator App 20020196692 - Fiscus, Timothy E.	2002-12-26
Pre-divider Architecture For Low Power In A Digital Delay Locked Loop App 20020140471 - Fiscus, Timothy E.	2002-10-03
Method for guaranteeing a minimum data strobe valid window and a minimum data valid window for DDR memory devices App 20020099987 - Corbin, William R. ; et al.	2002-07-25
Setting the common mode level of a differential charge pump output Grant 6,255,873 - Johnson , et al. July 3, 2	2001-07-03
Variable delay cell with a self-biasing load Grant 5,994,939 - Johnson , et al. November 30, 1	1999-11-30

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