Fiordalice; Robert W.
Patent Applications and Registrations
Patent applications and USPTO patent grants for Fiordalice; Robert W..The latest application filed is for "barrier enhancement".
- Fiordalice; Robert W. - Austin TX
| Patent | Date |
|---|---|
| Barrier material formation in integrated circuit structures Grant 7,446,416 - Fiordalice , et al. November 4, 2 | 2008-11-04 |
| Barrier enhancement App 20050212138 - Fiordalice, Robert W. ; et al. | 2005-09-29 |
| Barrier enhancement Grant 6,949,457 - Fiordalice , et al. September 27, 2 | 2005-09-27 |
| Method for forming a semiconductor device Grant 6,218,302 - Braeckelmann , et al. April 17, 2 | 2001-04-17 |
| Inert plasma gas surface cleaning process performed insitu with physical vapor deposition (PVD) of a layer of material Grant 6,187,682 - Denning , et al. February 13, 2 | 2001-02-13 |
| Method of forming an interconnect structure Grant 5,814,557 - Venkatraman , et al. September 29, 1 | 1998-09-29 |
| Process for fabricating a metallized interconnect Grant 5,783,485 - Ong , et al. July 21, 1 | 1998-07-21 |
| Method for providing trench isolation Grant 5,677,231 - Maniar , et al. October 14, 1 | 1997-10-14 |
| Method for providing trench isolation and borderless contact Grant 5,652,176 - Maniar , et al. July 29, 1 | 1997-07-29 |
| Process for fabricating a metallized interconnect structure in a semiconductor device Grant 5,633,199 - Fiordalice , et al. May 27, 1 | 1997-05-27 |
| Method for forming inlaid interconnects in a semiconductor device Grant 5,578,523 - Fiordalice , et al. November 26, 1 | 1996-11-26 |
| Method for forming a plug and semiconductor device having the same Grant 5,534,462 - Fiordalice , et al. July 9, 1 | 1996-07-09 |
| Method for making a semiconductor device having anti-reflective coating Grant 5,525,542 - Maniar , et al. June 11, 1 | 1996-06-11 |
| Process for fabricating a metallization structure in a semiconductor device Grant 5,429,989 - Fiordalice , et al. July 4, 1 | 1995-07-04 |
| Method for forming a conductive interconnect in an integrated circuit Grant 5,420,072 - Fiordalice , et al. May 30, 1 | 1995-05-30 |
| Process for forming copper interconnect structure Grant 5,391,517 - Gelatos , et al. February 21, 1 | 1995-02-21 |
| Process for forming an intermetallic layer Grant 5,358,901 - Fiordalice , et al. October 25, 1 | 1994-10-25 |
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