Filseth; Paul G.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Filseth; Paul G..The latest application filed is for "correcting errors in miscorrected codewords using list decoding".

Company Profile

0.13.9

Filseth; Paul G. - Los Gatos CA US

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Correcting errors in miscorrected codewords using list decoding Grant 8,898,539 - Han , et al. November 25, 2	2014-11-25
Correcting Errors In Miscorrected Codewords Using List Decoding App 20140075264 - Han; Yang ; et al.	2014-03-13
Alternate galois field advanced encryption standard round Grant 8,411,853 - Filseth , et al. April 2, 2	2013-04-02
High performance arithmetic logic unit (ALU) for cryptographic applications with built-in countermeasures against side channel attacks Grant 8,359,479 - Grinchuk , et al. January 22, 2	2013-01-22
Multiple-mode Cryptographic Module Usable With Memory Controllers App 20110255689 - Bolotov; Anatoli ; et al.	2011-10-20
Multimode block cipher architectures Grant 8,023,644 - Bolotov , et al. September 20, 2	2011-09-20
Method and system for reducing inter-layer capacitance in integrated circuits Grant 8,015,540 - Taravade , et al. September 6, 2	2011-09-06
Flexible hardware architecture for ECC/HECC based cryptography Grant 7,961,872 - Bolotov , et al. June 14, 2	2011-06-14
Alternate galois field advanced encryption standard round App 20100057823 - Filseth; Paul G. ; et al.	2010-03-04
High performance arithmetic logic unit (ALU) for cryptographic applications with built-in countermeasures against side channel attacks App 20100017622 - Grinchuk; Mikhail I. ; et al.	2010-01-21
Method and system for reducing inter-layer capacitance in integrated circuits App 20080235643 - Taravade; Kunal N. ; et al.	2008-09-25
Method and system for reducing inter-layer capacitance in integrated circuits Grant 7,396,760 - Taravade , et al. July 8, 2	2008-07-08
Flexible hardware architecture for ECC/HECC based crytography App 20080130873 - Bolotov; Anatoli A. ; et al.	2008-06-05
Multimode Block Cipher Architectures App 20080130872 - Bolotov; Anatoli A. ; et al.	2008-06-05
Method and system for reducing inter-layer capacitance in integrated circuits App 20060105564 - Taravade; Kunal N. ; et al.	2006-05-18
Mask correction for photolithographic processes Grant 6,934,410 - Aleshin , et al. August 23, 2	2005-08-23
Optical and etch proximity correction Grant 6,701,511 - Filseth , et al. March 2, 2	2004-03-02
Mask correction optimization Grant 6,611,953 - Filseth , et al. August 26, 2	2003-08-26

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