Fiduccia; Nicholas S.
Patent Applications and Registrations
Patent applications and USPTO patent grants for Fiduccia; Nicholas S..The latest application filed is for "method of automatically generating repeater blocks in hdl and integrating them into a region constrained chip design".
- Fiduccia; Nicholas S. - Saratoga CA
| Patent | Date |
|---|---|
| Method of automatically generating repeater blocks in HDL and integrating them into a region constrained chip design Grant 6,473,889 - Gluss , et al. October 29, 2 | 2002-10-29 |
| Routing techniques to assure electrical integrity in datapath blocks Grant 5,987,241 - Goldberg , et al. November 16, 1 | 1999-11-16 |
| Routing for integrated circuits Grant 5,894,142 - Fiduccia , et al. April 13, 1 | 1999-04-13 |
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