loadpatents
name:-0.023405075073242
name:-0.011280059814453
name:-0.00056219100952148
Fetzer; Eric S. Patent Filings

Fetzer; Eric S.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Fetzer; Eric S..The latest application filed is for "receiver and method for mitigating temporary logic transitions".

Company Profile
0.12.17
  • Fetzer; Eric S. - Longmont CO
  • Fetzer; Eric S - Longmont CO
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
System and method for dynamically varying a clock signal
Grant 7,394,301 - Fetzer , et al. July 1, 2
2008-07-01
Receiver and method for mitigating temporary logic transitions
Grant 7,200,821 - Wang , et al. April 3, 2
2007-04-03
System to temporarily modify an output waveform
Grant 7,199,611 - Naffziger , et al. April 3, 2
2007-04-03
System and method for measuring current
Grant 7,123,104 - Bostak , et al. October 17, 2
2006-10-17
Receiver and method for mitigating temporary logic transitions
App 20050270082 - Wang, Lei ;   et al.
2005-12-08
System and method for dynamically varying a clock signal
App 20050231259 - Fetzer, Eric S. ;   et al.
2005-10-20
Register renaming to reduce bypass and increase apparent physical register size
Grant 6,944,751 - Fetzer , et al. September 13, 2
2005-09-13
System and method for dynamically varying a clock signal
Grant 6,927,605 - Fetzer , et al. August 9, 2
2005-08-09
Multidispatch CPU integrated circuit having virtualized and modular resources and adjustable dispatch priority
Grant 6,895,497 - Fetzer , et al. May 17, 2
2005-05-17
System and method for dynamically varying a clock signal
App 20050099210 - Fetzer, Eric S. ;   et al.
2005-05-12
Power estimation based on power characterizations of non-conventional circuits
App 20050050494 - McGuffin, Tyson R. ;   et al.
2005-03-03
System toTemporarily Modify an Output Waveform
App 20050040870 - Naffziger, Samuel D. ;   et al.
2005-02-24
System and method for measuring current
App 20050040901 - Bostak, Christopher J. ;   et al.
2005-02-24
Method And Circuit For Measuring On-chip, Cycle-to-cycle Clock Jitter
App 20050024037 - Fetzer, Eric S.
2005-02-03
System and method for evaluating the speed of a circuit
App 20050007154 - Patella, Benjamin J. ;   et al.
2005-01-13
Method and circuit for measuring on-chip, cycle-to-cycle clock jitter
Grant 6,841,985 - Fetzer January 11, 2
2005-01-11
Method and circuit for reducing silent data corruption in storage arrays with no increase in read and write times
App 20040148559 - Fetzer, Eric S. ;   et al.
2004-07-29
Mechanism for data forwarding
App 20040062240 - Fetzer, Eric S. ;   et al.
2004-04-01
Mechanism for data forwarding
Grant 6,707,831 - Fetzer , et al. March 16, 2
2004-03-16
Method and apparatus for reducing average power in RAMs by dynamically changing the bias on PFETs contained in memory cells
Grant 6,665,227 - Fetzer December 16, 2
2003-12-16
Multidispatch cpu integrated circuit having virtualized and modular resources and adjustable dispatch priority
App 20030172250 - Fetzer, Eric S. ;   et al.
2003-09-11
Register renaming to reduce bypass and increase apparent physical register size
App 20030163672 - Fetzer, Eric S. ;   et al.
2003-08-28
Dynamically adjustable cache size based on application behavior to save power
App 20030145239 - Kever, Wayne D. ;   et al.
2003-07-31
Simplified cache hierarchy by using multiple tags and entries into a large subdivided array
App 20030145171 - Fetzer, Eric S. ;   et al.
2003-07-31
Adapting VLSI clocking to short term voltage transients
Grant 6,586,971 - Naffziger , et al. July 1, 2
2003-07-01
Adapting Vlsi Clocking To Short Term Voltage Transients
App 20030112038 - Naffziger, Samuel ;   et al.
2003-06-19
Method and apparatus for reducing average power and increasing cache performance by modulating power supplies
App 20030076729 - Fetzer, Eric S. ;   et al.
2003-04-24
Method and apparatus for reducing average power in RAMs by dynamically changing the bias on PFETs contained in memory cells
App 20030076701 - Fetzer, Eric S.
2003-04-24
Method and apparatus for reducing average power in memory arrays by switching a diode in or out of the ground path
Grant 6,515,935 - Fetzer February 4, 2
2003-02-04

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