Fertsch; Michael Thomas
Patent Applications and Registrations
Patent applications and USPTO patent grants for Fertsch; Michael Thomas.The latest application filed is for "programmable delay circuit for low power applications".
- Fertsch; Michael Thomas - San Diego CA
| Patent | Date |
|---|---|
| Programmable Delay Circuit For Low Power Applications App 20160329884 - Sridhar; Shraddha ; et al. | 2016-11-10 |
| Programmable delay circuit for low power applications Grant 9,490,785 - Sridhar , et al. November 8, 2 | 2016-11-08 |
| Frequency power manager Grant 9,305,632 - Syed , et al. April 5, 2 | 2016-04-05 |
| Current mode logic circuit with multiple frequency modes Grant 9,281,810 - Singh , et al. March 8, 2 | 2016-03-08 |
| Receiver architecture for memory reads Grant 9,213,487 - Vasudevan , et al. December 15, 2 | 2015-12-15 |
| Current Mode Logic Circuit With Multiple Frequency Modes App 20150333743 - Singh; Guneet ; et al. | 2015-11-19 |
| Delay Architecture For Reducing Downtime During Frequency Switching App 20150109034 - Vasudevan; Narasimhan ; et al. | 2015-04-23 |
| Systems And Methods For Reducing Cross-supply Current App 20150108842 - Chen; Nan ; et al. | 2015-04-23 |
| Receiver Architecture For Memory Reads App 20150106538 - Vasudevan; Narasimhan ; et al. | 2015-04-16 |
| Frequency Power Manager App 20140321227 - SYED; Zeeshan ; et al. | 2014-10-30 |
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