Feng; George C.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Feng; George C..The latest application filed is for "structure and method for forming a dielectric chamber and electronic device including dielectric chamber".

Company Profile

0.10.5

Feng; George C. - Poughkeepsie NY
Feng; George C. - Wappingers Falls NY
Feng; George C. - Essex Junction VT
Feng; George C. - Fishkill NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Structure And Method For Forming A Dielectric Chamber And Electronic Device Including Dielectric Chamber App 20080029841 - Feng; George C. ; et al.	2008-02-07
Structure and method for forming a dielectric chamber and electronic device including the dielectric chamber Grant 7,307,011 - Feng , et al. December 11, 2	2007-12-11
Inclusion of low-k dielectric material between bit lines Grant 7,125,790 - Low , et al. October 24, 2	2006-10-24
Structure and method for forming a dielectric chamber and electronic device including the dielectric chamber Grant 7,018,916 - Feng , et al. March 28, 2	2006-03-28
Structure and method for forming a dielectric chamber and electronic device including the dielectric chamber App 20050199977 - Feng, George C. ; et al.	2005-09-15
Structure and method for forming a dielectric chamber and electronic device including the dielectric chamber App 20050095837 - Feng, George C. ; et al.	2005-05-05
Inclusion of low-k dielectric material between bit lines App 20050085096 - Low, Kia Seng ; et al.	2005-04-21
Method to improve performance of microelectronic circuits App 20040038489 - Clevenger, Lawrence A. ; et al.	2004-02-26
High speed and low cost SDRAM memory subsystem Grant 5,896,346 - Dell , et al. April 20, 1	1999-04-20
Synchronous memory packaged in single/dual in-line memory module and method of fabrication Grant 5,513,135 - Dell , et al. April 30, 1	1996-04-30
Multi-layer package incorporating a recessed cavity for a semiconductor chip Grant 5,081,563 - Feng , et al. January 14, 1	1992-01-14
Two layer resist system Grant 4,238,559 - Feng , et al. December 9, 1	1980-12-09
Two layer resist system Grant 4,204,009 - Feng , et al. May 20, 1	1980-05-20
Two layer resist system Grant 4,180,604 - Feng , et al. December 25, 1	1979-12-25
Method of manufacturing self-aligned semiconductor devices Grant 4,131,497 - Feng , et al. December 26, 1	1978-12-26

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