loadpatents
name:-0.014652013778687
name:-0.008552074432373
name:-0.0005037784576416
Fen; Sueann Lim Wei Patent Filings

Fen; Sueann Lim Wei

Patent Applications and Registrations

Patent applications and USPTO patent grants for Fen; Sueann Lim Wei.The latest application filed is for "leadframe strip with vertically offset die attach pads between adjacent vertical leadframe columns".

Company Profile
0.8.13
  • Fen; Sueann Lim Wei - Melaka MY
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Integrated circuit package fabrication
Grant 9,859,197 - Eugene Lee , et al. January 2, 2
2018-01-02
Leadframe strip with vertically offset die attach pads between adjacent vertical leadframe columns
Grant 9,741,643 - Lee , et al. August 22, 2
2017-08-22
Leadframe Strip With Vertically Offset Die Attach Pads Between Adjacent Vertical Leadframe Columns
App 20170213784 - Lee; Lee Han Meng@Eugene ;   et al.
2017-07-27
Forming a panel of triple stack semiconductor packages
Grant 9,691,748 - Eugene Lee , et al. June 27, 2
2017-06-27
Integrated Circuit Assembly
App 20170110408 - Eugene Lee; Lee Han Meng@ ;   et al.
2017-04-20
Packaged Semiconductor Device Having Leadframe Features Preventing Delamination
App 20170053814 - Fen; Sueann Lim Wei ;   et al.
2017-02-23
Flippable Leadframe for Packaged Electronic System Having Vertically Stacked Chips and Components
App 20170025332 - Eugene Lee; Lee Han Meng@ ;   et al.
2017-01-26
Packaged semiconductor device having leadframe features preventing delamination
Grant 9,515,009 - Fen , et al. December 6, 2
2016-12-06
Flippable leadframe for packaged electronic system having vertically stacked chips and components
Grant 9,496,206 - Eugene Lee , et al. November 15, 2
2016-11-15
Flippable Leadframe For Packaged Electronic System Having Vertically Stacked Chips And Components
App 20160300784 - Eugene Lee; Lee Han Meng@ ;   et al.
2016-10-13
Packaged Semiconductor Device Having Leadframe Features Preventing Delamination
App 20160204052 - Fen; Sueann Lim Wei ;   et al.
2016-07-14
Making A Flat No-lead Package With Exposed Electroplated Side Lead Surfaces
App 20160181122 - Eugene Lee; Lee Han Meng@ ;   et al.
2016-06-23
Forming A Panel Of Triple Stack Semiconductor Packages
App 20160133617 - EUGENE LEE; LEE HAN MENG @ ;   et al.
2016-05-12
Triple Stack Semiconductor Package
App 20160126230 - EUGENE LEE; LEE HAN MENG @ ;   et al.
2016-05-05
Triple stack semiconductor package
Grant 9,324,640 - Eugene Lee , et al. April 26, 2
2016-04-26
Lead frame with abutment surface
Grant 9,184,119 - Eugene Lee , et al. November 10, 2
2015-11-10
Lead Frame With Abutment Surface
App 20150228563 - Eugene Lee; Lee Han Meng@ ;   et al.
2015-08-13
Integrated Circuit Package Fabrication
App 20150228581 - Eugene Lee; Lee Han Meng@ ;   et al.
2015-08-13
Integrated circuit package and method of making
Grant 9,013,028 - Lee , et al. April 21, 2
2015-04-21
Locking Dual Leadframe For Flip Chip On Leadframe Packages
App 20150060123 - EUGENE LEE; LEE HAN MENG @ ;   et al.
2015-03-05
Integrated Circuit Package And Method Of Making
App 20140191380 - Lee; Lee Han Meng@Eugene ;   et al.
2014-07-10

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