| Patent | Date |
|---|
Stabilization gas environments in a proton-exchanged lithium niobate optical chip
Grant 9,817,254 - Iwamoto , et al. November 14, 2 | 2017-11-14 |
Compact self-aligned implantation transistor edge resistor for SRAM SEU mitigation
Grant 9,773,808 - Fechner September 26, 2 | 2017-09-26 |
ph sensor with bonding agent disposed in a pattern
Grant 9,671,362 - Horkheimer , et al. June 6, 2 | 2017-06-06 |
pH sensor with substrate or bonding layer configured to maintain piezoresistance of the ISFET die
Grant 9,664,641 - Horkheimer , et al. May 30, 2 | 2017-05-30 |
Integrated radiation sensitive circuit
Grant 9,618,635 - Fechner April 11, 2 | 2017-04-11 |
Compact Self-aligned Implantation Transistor Edge Resistor For Sram Seu Mitigation
App 20160329349 - Fechner; Paul S. | 2016-11-10 |
Stabilization Gas Environments In A Proton-exchanged Lithium Niobate Optical Chip
App 20160246079 - Iwamoto; Nancy E. ; et al. | 2016-08-25 |
Converter for analog inputs
Grant 9,246,501 - Tucker , et al. January 26, 2 | 2016-01-26 |
Converter For Analog Inputs
App 20150311909 - Tucker; James L. ; et al. | 2015-10-29 |
CMOS logic circuit using passive internal body tie bias
Grant 8,975,952 - Fechner , et al. March 10, 2 | 2015-03-10 |
pH SENSOR WITH SUBSTRATE OR BONDING LAYER CONFIGURED TO MAINTAIN PIEZORESISTANCE OF THE ISFET DIE
App 20150028396 - Horkheimer; Donald ; et al. | 2015-01-29 |
pH SENSOR WITH BONDING AGENT DISPOSED IN A PATTERN
App 20150028395 - Horkheimer; Donald ; et al. | 2015-01-29 |
Integrated comparative radiation sensitive circuit
Grant 8,933,412 - Fechner January 13, 2 | 2015-01-13 |
Programmable electrical fuse with temperature gradient between anode and cathode
Grant 8,901,702 - Vogt , et al. December 2, 2 | 2014-12-02 |
Programmable Electrical Fuse With Temperature Gradient Between Anode And Cathode
App 20140332922 - Vogt; Eric E. ; et al. | 2014-11-13 |
Method for digital programmable optimization of mixed-signal circuits
Grant 8,742,831 - Fechner June 3, 2 | 2014-06-03 |
Cmos Logic Circuit Using Passive Internal Body Tie Bias
App 20140132306 - Fechner; Paul S. ; et al. | 2014-05-15 |
Integrated Comparative Radiation Sensitive Circuit
App 20130341521 - Fechner; Paul S. | 2013-12-26 |
Integrated Radiation Sensitive Circuit
App 20130341522 - Fechner; Paul S. | 2013-12-26 |
Integrated circuit cumulative dose radiation sensor
Grant 8,575,560 - Fechner November 5, 2 | 2013-11-05 |
Neutron detector cell efficiency
Grant 8,399,845 - Fechner , et al. March 19, 2 | 2013-03-19 |
Neutron Detector Cell Efficiency
App 20120228513 - Fechner; Paul S. ; et al. | 2012-09-13 |
Neutron detector cell efficiency
Grant 8,153,985 - Randazzo , et al. April 10, 2 | 2012-04-10 |
Neutron Sensor With Thin Interconnect Stack
App 20110186940 - Randazzo; Todd Andrew ; et al. | 2011-08-04 |
Direct contact to area efficient body tie process flow
Grant 7,964,897 - Fechner , et al. June 21, 2 | 2011-06-21 |
Neutron Detector Cell Efficiency
App 20110089331 - Randazzo; Todd Andrew ; et al. | 2011-04-21 |
Method For Digital Programmable Optimization Of Mixed-signal Circuits
App 20100214009 - Fechner; Paul S. | 2010-08-26 |
Method of forming a body-tie
Grant 7,732,287 - Fechner , et al. June 8, 2 | 2010-06-08 |
High Voltage Soi Cmos Device And Method Of Manufacture
App 20100117153 - Lucking; Thomas B. ; et al. | 2010-05-13 |
Non-planar silicon-on-insulator device that includes an "area-efficient" body tie
Grant 7,679,139 - Larsen , et al. March 16, 2 | 2010-03-16 |
Non-Planar Silicon-On-Insulator Device that Includes an "Area-Efficient" Body Tie
App 20090065866 - Larsen; Bradley J. ; et al. | 2009-03-12 |
Fabrication process for silicon-on-insulator field effect transistors using high temperature nitrogen annealing
App 20080254590 - Vogt; Eric E. ; et al. | 2008-10-16 |
Integrated Resistor Capacitor Structure
App 20080233704 - Fechner; Paul S. ; et al. | 2008-09-25 |
Method of forming a body-tie
App 20070257317 - Fechner; Paul S. ; et al. | 2007-11-08 |
Method of straining a silicon island for mobility improvement
App 20070224838 - Vogt; Eric E. ; et al. | 2007-09-27 |
Self-aligned body tie for a partially depleted SOI device structure
Grant 7,192,816 - Fechner March 20, 2 | 2007-03-20 |
Bit end design for pseudo spin valve (PSV) devices
Grant 7,183,042 - Katti , et al. February 27, 2 | 2007-02-27 |
Bit end design for pseudo spin valve (PSV) devices
App 20050101079 - Katti, Romney R. ; et al. | 2005-05-12 |
High speed SOI transistors
App 20030189227 - Liu, Michael S. ; et al. | 2003-10-09 |
Frontside contact on silicon-on-insulator substrate
Grant 6,603,166 - Fechner , et al. August 5, 2 | 2003-08-05 |
On chip smart capacitors
App 20030103301 - Fechner, Paul S. | 2003-06-05 |
Formation of a frontside contact on silicon-on-insulator substrate
App 20020195638 - Fechner, Paul S. ; et al. | 2002-12-26 |
Formation of a frontside contact on silicon-on-insulator substrate
App 20020130347 - Fechner, Paul S. ; et al. | 2002-09-19 |
Method for forming a frontside contact to the silicon substrate of a SOI wafer in the presence of planarized contact dielectrics
Grant 6,300,666 - Fechner , et al. October 9, 2 | 2001-10-09 |
SEU hardening circuit
Grant 6,058,041 - Golke , et al. May 2, 2 | 2000-05-02 |
Random access memory cell resistant to radiation induced upsets
Grant 5,631,863 - Fechner , et al. May 20, 1 | 1997-05-20 |
Method for electrically characterizing the insulator in SOI devices
Grant 5,519,336 - Liu , et al. May 21, 1 | 1996-05-21 |
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