loadpatents
name:-0.043341875076294
name:-0.14735698699951
name:-0.031051874160767
Fazil; Damir Patent Filings

Fazil; Damir

Patent Applications and Registrations

Patent applications and USPTO patent grants for Fazil; Damir.The latest application filed is for "microelectronic devices including an interdeck region between deck structures, and related electronic devices".

Company Profile
4.8.11
  • Fazil; Damir - Boise ID
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Microelectronic Devices Including An Interdeck Region Between Deck Structures, And Related Electronic Devices
App 20220301860 - Hopkins; John D. ;   et al.
2022-09-22
Integrated assemblies, and methods of forming integrated assemblies
Grant 11,430,809 - Hossain , et al. August 30, 2
2022-08-30
Methods of forming microelectronic devices including an interdeck region between deck structures
Grant 11,393,672 - Hopkins , et al. July 19, 2
2022-07-19
Memory arrays and methods used in forming a memory array
Grant 11,329,062 - Dorhout , et al. May 10, 2
2022-05-10
Integrated Assemblies, and Methods of Forming Integrated Assemblies
App 20220045086 - Hossain; S.M. Istiaque ;   et al.
2022-02-10
Integrated Assemblies Which Include Stacked Memory Decks, and Methods of Forming Integrated Assemblies
App 20210358951 - Hopkins; John D. ;   et al.
2021-11-18
Methods of forming integrated assemblies include stacked memory decks
Grant 11,107,831 - Hopkins , et al. August 31, 2
2021-08-31
Methods Of Forming Microelectronic Devices Including An Interdeck Region Between Deck Structures
App 20210249261 - Hopkins; John D. ;   et al.
2021-08-12
Memory arrays and methods used in forming a memory array
Grant 11,056,497 - Hopkins , et al. July 6, 2
2021-07-06
Integrated Assemblies Which Include Stacked Memory Decks, and Methods of Forming Integrated Assemblies
App 20210167081 - Hopkins; John D. ;   et al.
2021-06-03
Electronic Devices And Systems With Channel Openings Or Pillars Extending Through A Tier Stack, And Methods Of Formation
App 20210013228 - Hopkins; John D. ;   et al.
2021-01-14
Memory Arrays And Methods Used In Forming A Memory Array
App 20200357809 - Hopkins; John D. ;   et al.
2020-11-12
Semiconductor devices and systems with channel openings or pillars extending through a tier stack, and methods of formation
Grant 10,825,828 - Hopkins , et al. November 3, 2
2020-11-03
Memory Arrays And Methods Used In Forming A Memory Array
App 20200127004 - Dorhout; Justin B. ;   et al.
2020-04-23
Semiconductor Devices And Systems With Channel Openings Or Pillars Extending Through A Tier Stack, And Methods Of Formation
App 20200119038 - Hopkins; John D. ;   et al.
2020-04-16
Memory devices and systems having reduced bit line to drain select gate shorting and associated methods
Grant 10,134,758 - Zhu , et al. November 20, 2
2018-11-20
Memory Devices And Systems Having Reduced Bit Line To Drain Select Gate Shorting And Associated Methods
App 20180130819 - Zhu; Hongbin ;   et al.
2018-05-10
Memory devices and systems having reduced bit line to drain select gate shorting and associated methods
Grant 9,741,734 - Zhu , et al. August 22, 2
2017-08-22
Memory Devices And Systems Having Reduced Bit Line To Drain Select Gate Shorting And Associated Methods
App 20170170190 - Zhu; Hongbin ;   et al.
2017-06-15

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