Faul; Jurgen

Patent Applications and Registrations

Patent applications and USPTO patent grants for Faul; Jurgen.The latest application filed is for "voltage divider topology circuit structure".

Company Profile

2.11.12

Faul; Jurgen - Radebeul DE
Faul; Jurgen - Dresden DE

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Back-gate biasing voltage divider topology circuit structure Grant 10,775,826 - Hensel , et al. Sept	2020-09-15
Voltage Divider Topology Circuit Structure App 20200159270 - Hensel; Ulrich G. ; et al.	2020-05-21
Process for forming semiconductor layers of different thickness in FDSOI technologies Grant 10,141,229 - Faul , et al. Nov	2018-11-27
Process For Forming Semiconductor Layers Of Different Thickness In Fdsoi Technologies App 20180090386 - Faul; Jurgen ; et al.	2018-03-29
Reducing antenna effects in SOI devices Grant 9,773,811 - Lorenz , et al. September 26, 2	2017-09-26
Reducing Antenna Effects In Soi Devices App 20170243894 - Lorenz; Ingolf ; et al.	2017-08-24
Method for the production of a semiconductor substrate comprising a plurality of gate stacks on a semiconductor substrate, and corresponding semiconductor structure Grant 7,679,120 - Amon , et al. March 16, 2	2010-03-16
Integrated Circuit Comprising a Field Effect Transistor and Method of Fabricating the Same App 20090121286 - Goldbach; Matthias ; et al.	2009-05-14
Method of manufacturing an integrated circuit App 20090098701 - Faul; Jurgen ; et al.	2009-04-16
Method for the production of a semiconductor substrate comprising a plurality of gate stacks on a semiconductor substrate, and corresponding semiconductor structure App 20070205437 - Amon; Jurgen ; et al.	2007-09-06
Method for fabricating a semiconductor structure Grant 7,259,060 - Amon , et al. August 21, 2	2007-08-21
Method for the production of a semiconductor substrate comprising a plurality of gate stacks on a semiconductor substrate, and corresponding semiconductor structure Grant 7,118,955 - Amon , et al. October 10, 2	2006-10-10
Process for producing a doped semiconductor substrate Grant 7,078,325 - Curello , et al. July 18, 2	2006-07-18
Method for fabricating a semiconductor structure Grant 6,967,133 - Amon , et al. November 22, 2	2005-11-22
Method for fabricating a p-channel field-effect transistor on a semiconductor substrate Grant 6,943,116 - Alsmeier , et al. September 13, 2	2005-09-13
Method For Fabricating A P-channel Field-effect Transistor On A Semiconductor Substrate App 20050148178 - Alsmeier, Johann ; et al.	2005-07-07
Method for the production of a semiconductor substrate comprising a plurality of gate stacks on a semiconductor substrate, and corresponding semiconductor structure App 20050130370 - Amon, Jurgen ; et al.	2005-06-16
Method for fabricating a semiconductor structure App 20050124124 - Amon, Jurgen ; et al.	2005-06-09
Trench capacitor with an insulation collar and method for producing a trench capacitor Grant 6,828,191 - Wurster , et al. December 7, 2	2004-12-07
Method for fabricating a semiconductor structure App 20040115874 - Amon, Jurgen ; et al.	2004-06-17
Memory with trench capacitor and selection transistor and method for fabricating it Grant 6,664,167 - Temmler , et al. December 16, 2	2003-12-16
Memory with trench capacitor and selection transistor and method for fabricating it App 20020137278 - Temmler, Dietmar ; et al.	2002-09-26
Process for producing a doped semiconductor substrate App 20020016049 - Curello, Giuseppe ; et al.	2002-02-07

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