Faucher; Marc R.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Faucher; Marc R..The latest application filed is for "method and system for integrating sram and dram architecture in set associative cache".

Company Profile

0.15.6

Faucher; Marc R. - South Burlington VT
Faucher; Marc R. - So. Burlington VT
Faucher; Marc R. - S. Burlington VT

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Connection management method, system, and program product Grant 8,244,880 - Faucher , et al. August 14, 2	2012-08-14
Three-dimensional networking design structure Grant 8,019,970 - Bernstein , et al. September 13, 2	2011-09-13
Method and system for integrating SRAM and DRAM architecture in set associative cache Grant 7,962,695 - Faucher , et al. June 14, 2	2011-06-14
Method and system for implementing prioritized refresh of DRAM based cache Grant 7,882,302 - Faucher , et al. February 1, 2	2011-02-01
Three-dimensional networking structure Grant 7,865,694 - Bernstein , et al. January 4, 2	2011-01-04
Method And System For Integrating Sram And Dram Architecture In Set Associative Cache App 20090144503 - Faucher; Marc R. ; et al.	2009-06-04
Method And System For Implementing Prioritized Refresh Of Dram Based Cache App 20090144491 - Faucher; Marc R. ; et al.	2009-06-04
Three-dimensional Networking Design Structure App 20090138581 - Bernstein; Kerry ; et al.	2009-05-28
Connection Management Method, System, And Program Product App 20080313339 - Faucher; Marc R. ; et al.	2008-12-18
Three-dimensional Networking Structure App 20070266129 - Bernstein; Kerry ; et al.	2007-11-15
Connection Management Method, System, And Program Product App 20060235957 - Faucher; Marc R. ; et al.	2006-10-19
Method for making a memory card adapter insertable into a motherboard memory card socket comprising a memory card receiving socket having the same configuration as the motherboard memory card socket Grant 6,457,155 - Dell , et al. September 24, 2	2002-09-24
Memory card design with parity and ECC for non-parity and non-ECC systems Grant 6,185,718 - Dell , et al. February 6, 2	2001-02-06
Microprocessor system requests burstable access to noncacheable memory areas and transfers noncacheable address on a bus at burst mode Grant 6,178,467 - Faucher , et al. January 23, 2	2001-01-23
Memory card adapter insertable into a motherboard memory card socket comprising a memory card receiving socket having the same configuration as the motherboard memory card socket Grant 6,108,730 - Dell , et al. August 22, 2	2000-08-22
Method and apparatus for ECC bus protection in a computer system with non-parity memory Grant 6,052,818 - Dell , et al. April 18, 2	2000-04-18
Stackable memory card Grant 5,963,464 - Dell , et al. October 5, 1	1999-10-05
Non-contiguous mapping of I/O addresses to use page protection of a process Grant 5,548,746 - Carpenter , et al. August 20, 1	1996-08-20
System for combining data from multiple CPU write requests via buffers and using read-modify-write operation to write the combined data to the memory Grant 5,459,842 - Begun , et al. October 17, 1	1995-10-17
Connecting a short word length non-volatile memory to a long word length address/data multiplexed bus Grant 5,448,521 - Curry , et al. September 5, 1	1995-09-05
Method and system for reducing an amount of power utilized by selecting a lowest power mode from a plurality of power modes Grant 5,404,543 - Faucher , et al. April 4, 1	1995-04-04

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