| Patent | Date |
|---|
Ldmos Transistors Including Vertical Gates With Multiple Dielectric Sections, And Associated Methods
App 20220254922 - Castro; Tom K. ; et al. | 2022-08-11 |
LDMOS transistors including vertical gates with multiple dielectric sections, and associated methods
Grant 11,316,044 - Castro , et al. April 26, 2 | 2022-04-26 |
Multi-transistor Devices
App 20210217748 - Pala; Vipindas ; et al. | 2021-07-15 |
Multi-transistor device including first and second LDMOS transistors having respective drift regions separated in a thickness direction by a shared RESURF layer
Grant 10,964,694 - Pala , et al. March 30, 2 | 2021-03-30 |
LDMOS transistors and associated systems and methods
Grant 10,833,164 - Xia , et al. November 10, 2 | 2020-11-10 |
Transistors With Dual Gate Conductors, And Associated Methods
App 20200243659 - Castro; Tom K. ; et al. | 2020-07-30 |
Transistors with dual gate conductors, and associated methods
Grant 10,622,452 - Castro , et al. | 2020-04-14 |
Self-aligned, dual-gate LDMOS transistors and associated methods
Grant 10,573,744 - Zuniga , et al. Feb | 2020-02-25 |
Transistors With Dual Gate Conductors, And Associated Methods
App 20190371902 - Castro; Tom K. ; et al. | 2019-12-05 |
Multi-transistor Devices
App 20190259751 - Pala; Vipindas ; et al. | 2019-08-22 |
LDMOS Transistors And Associated Systems And Methods
App 20190181237 - Xia; John ; et al. | 2019-06-13 |
Voltage regulators with multiple transistors
Grant 10,284,072 - Zuniga , et al. | 2019-05-07 |
LDMOS transistors and associated systems and methods
Grant 10,269,916 - Xia , et al. | 2019-04-23 |
LDMOS transistors including resurf layers and stepped-gates, and associated systems and methods
Grant 10,229,993 - Xia , et al. | 2019-03-12 |
LDMOS transistors and associated systems and methods
Grant 10,199,475 - Xia , et al. Fe | 2019-02-05 |
Ldmos Transistors Including Vertical Gates With Multiple Dielectric Sections, And Associated Methods
App 20180350980 - Castro; Tom K. ; et al. | 2018-12-06 |
Transistor with buried P+ and source contact
Grant 10,147,801 - Zuniga , et al. De | 2018-12-04 |
LDMOS Transistors And Associated Systems And Methods
App 20170346476 - Xia; John ; et al. | 2017-11-30 |
LDMOS Transistors And Associated Systems And Methods
App 20170346477 - Xia; John ; et al. | 2017-11-30 |
Voltage Regulators With Multiple Transistors
App 20170338731 - Zuniga; Marco A. ; et al. | 2017-11-23 |
Ldmos Transistors Including Resurf Layers And Stepped-gates, And Associated Systems And Methods
App 20170263766 - Xia; John ; et al. | 2017-09-14 |
Voltage regulators with multiple transistors
Grant 9,722,483 - Zuniga , et al. August 1, 2 | 2017-08-01 |
Vertical gate LDMOS device
Grant 9,159,804 - Zuniga , et al. October 13, 2 | 2015-10-13 |
Vertical gate LDMOS device
Grant 8,969,158 - Zuniga , et al. March 3, 2 | 2015-03-03 |
Vertical Gate LDMOS Device
App 20140374826 - Zuniga; Marco A. ; et al. | 2014-12-25 |
Vertical gate LDMOS device
Grant 8,866,217 - Zuniga , et al. October 21, 2 | 2014-10-21 |
Voltage Regulators with Multiple Transistors
App 20140266113 - Zuniga; Marco A. ; et al. | 2014-09-18 |
Vertical Gate LDMOS Device
App 20140147979 - Zuniga; Marco A. ; et al. | 2014-05-29 |
Vertical gate LDMOS device
Grant 8,709,899 - Zuniga , et al. April 29, 2 | 2014-04-29 |
Vertical gate LDMOS device
Grant 8,647,950 - Zuniga , et al. February 11, 2 | 2014-02-11 |
Vertical Gate LDMOS Device
App 20130115744 - Zuniga; Marco A. ; et al. | 2013-05-09 |
Vertical Gate LDMOS Device
App 20130105887 - Zuniga; Marco A. ; et al. | 2013-05-02 |
Vertical Gate LDMOS Device
App 20130109143 - Zuniga; Marco A. ; et al. | 2013-05-02 |
Transistor with Buried P+ and Source Contact
App 20130105888 - Zuniga; Marco A. ; et al. | 2013-05-02 |
Vertical power JFET with low on-resistance for high voltage applications
Grant 7,235,827 - Fatemizadeh , et al. June 26, 2 | 2007-06-26 |
Low cost dielectric isolation method for integration of vertical power MOSFET and lateral driver devices
Grant 7,049,677 - Fatemizadeh , et al. May 23, 2 | 2006-05-23 |
Vertical power JFET with low on-resistance for high voltage applications
App 20050230745 - Fatemizadeh, Badredin ; et al. | 2005-10-20 |
Low cost dielectric isolation method for integration of vertical power MOSFET and lateral driver devices
App 20050161764 - Fatemizadeh, Badredin ; et al. | 2005-07-28 |
Selective epi-region method for integration of vertical power MOSFET and lateral driver devices
App 20050145915 - Fatemizadeh, Badredin ; et al. | 2005-07-07 |
Carrier coupler for thyristor-based semiconductor device
Grant 6,872,602 - Nemati , et al. March 29, 2 | 2005-03-29 |
Method and structure for improving the gate resistance of a closed cell trench power MOSFET
App 20050040459 - Amato, John E. ; et al. | 2005-02-24 |
Carrier coupler for thyristor-based semiconductor device
Grant 6,756,612 - Nemati , et al. June 29, 2 | 2004-06-29 |
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