Patent | Date |
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Recessed channel with separated ONO memory device Grant 7,394,125 - Park , et al. July 1, 2 | 2008-07-01 |
Alignment marks with salicided spacers between bitlines for alignment signal improvement Grant 7,098,546 - Lingunis , et al. August 29, 2 | 2006-08-29 |
Memory with improved charge-trapping dielectric layer Grant 7,074,677 - Halliyal , et al. July 11, 2 | 2006-07-11 |
Semiconductor memory device and method of fabricating the same App 20060145242 - Takagi; Hideo ;   et al. | 2006-07-06 |
Recessed channel with separated ONO memory device Grant 7,067,377 - Park , et al. June 27, 2 | 2006-06-27 |
Semiconductor memory device and method of fabricating the same Grant 7,037,780 - Takagi , et al. May 2, 2 | 2006-05-02 |
ONO fabrication process for increasing oxygen content at bottom oxide-substrate interface in flash memory devices Grant 7,033,957 - Shiraiwa , et al. April 25, 2 | 2006-04-25 |
Electrostatic discharge performance of a silicon structure and efficient use of area with electrostatic discharge protective device under the pad approach and adjustment of via configuration thereto to control drain junction resistance Grant 7,019,366 - Yang , et al. March 28, 2 | 2006-03-28 |
Method of determining voltage compensation for flash memory devices Grant 7,009,887 - Hsia , et al. March 7, 2 | 2006-03-07 |
Method and apparatus for manufacturing semiconductor device App 20060039011 - Higashi; Tohru | 2006-02-23 |
Bond pad structure for copper metallization having increased reliability and method for fabricating same App 20060006552 - Kang; Inkuk ;   et al. | 2006-01-12 |
Floating gate semiconductor component and method of manufacture Grant 6,984,563 - Higgins, Sr. , et al. January 10, 2 | 2006-01-10 |
Method and apparatus for manufacturing semiconductor device Grant 6,979,577 - Higashi December 27, 2 | 2005-12-27 |
Test structure for characterizing junction leakage current Grant 6,977,195 - Bush , et al. December 20, 2 | 2005-12-20 |
ONO fabrication process for reducing oxygen vacancy content in bottom oxide layer in flash memory devices Grant 6,969,886 - Park , et al. November 29, 2 | 2005-11-29 |
Flash memory device and method of fabrication thereof including a bottom oxide layer with two regions with different concentrations of nitrogen Grant 6,958,511 - Halliyal , et al. October 25, 2 | 2005-10-25 |
Process for fabrication of nitride layer with reduced hydrogen content in ONO structure in semiconductor device Grant 6,955,965 - Halliyal , et al. October 18, 2 | 2005-10-18 |
Semiconductor memory device and manufacturing method thereof App 20050224866 - Higashi, Masahiko ;   et al. | 2005-10-13 |
Process for fabrication of spacer layer with reduced hydrogen content in semiconductor device Grant 6,949,481 - Halliyal , et al. September 27, 2 | 2005-09-27 |
Method of formation of semiconductor resistant to hot carrier injection stress Grant 6,949,433 - Hidehiko , et al. September 27, 2 | 2005-09-27 |
Method to obtain temperature independent program threshold voltage distribution using temperature dependent voltage reference Grant 6,944,057 - Runnion , et al. September 13, 2 | 2005-09-13 |
Memory device having high work function gate and method of erasing same Grant 6,912,163 - Zheng , et al. June 28, 2 | 2005-06-28 |
Method of manufacturing a semiconductor memory with deuterated materials Grant 6,884,681 - Kamal , et al. April 26, 2 | 2005-04-26 |
Semiconductor device and method for manufacturing the same Grant 6,873,022 - Hayakawa March 29, 2 | 2005-03-29 |
Ground structure for page read and page write for flash memory Grant 6,859,393 - Yang , et al. February 22, 2 | 2005-02-22 |
I/O based column redundancy for virtual ground with 2-bit cell flash memory Grant 6,813,735 - Kurihara , et al. November 2, 2 | 2004-11-02 |
Innovative method of hard mask removal Grant 6,809,033 - Hui , et al. October 26, 2 | 2004-10-26 |
Liner for semiconductor memories and manufacturing method therefor Grant 6,803,265 - Ngo , et al. October 12, 2 | 2004-10-12 |
ONO fabrication process for reducing oxygen vacancy content in bottom oxide layer in flash memory devices Grant 6,803,275 - Park , et al. October 12, 2 | 2004-10-12 |
Non-volatile memory read circuit with end of life simulation Grant 6,791,880 - Kurihara , et al. September 14, 2 | 2004-09-14 |
Semiconductor memory device and method of fabricating the same App 20040110390 - Takagi, Hideo ;   et al. | 2004-06-10 |
Salicided gate for virtual ground arrays Grant 6,730,564 - Ramsbey , et al. May 4, 2 | 2004-05-04 |
Dummy wordline for erase and bitline leakage Grant 6,707,078 - Shiraiwa , et al. March 16, 2 | 2004-03-16 |