loadpatents
name:-0.015933036804199
name:-0.011880159378052
name:-0.00049901008605957
Farcy; Alexandre Patent Filings

Farcy; Alexandre

Patent Applications and Registrations

Patent applications and USPTO patent grants for Farcy; Alexandre.The latest application filed is for "providing thread fairness in a hyper-threaded microprocessor".

Company Profile
0.18.14
  • Farcy; Alexandre - Hillsboro OR
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Multiplication instruction for which execution completes without writing a carry flag
Grant 9,990,201 - Gopal , et al. June 5, 2
2018-06-05
Providing Thread Fairness In A Hyper-threaded Microprocessor
App 20170161106 - Marden; Morris ;   et al.
2017-06-08
Apparatus including a stall counter to bias processing element selection, and masks to allocate reservation unit entries to one or more processing elements
Grant 9,524,191 - Marden , et al. December 20, 2
2016-12-20
System and method for a load instruction with code conversion having access permissions to indicate failure of load content from registers
Grant 9,280,492 - Caprioli , et al. March 8, 2
2016-03-08
Load Instruction For Code Conversion
App 20150186299 - CAPRIOLI; PAUL ;   et al.
2015-07-02
Technique to perform three-source operations
Grant 8,825,989 - Sodani , et al. September 2, 2
2014-09-02
Technique To Perform Three-source Operations
App 20140052963 - Sodani; Avinash ;   et al.
2014-02-20
Technique to perform three-source operations
Grant 8,589,663 - Sodani , et al. November 19, 2
2013-11-19
Providing thread fairness by biasing selection away from a stalling thread using a stall-cycle counter in a hyper-threaded microprocessor
Grant 8,521,993 - Marden , et al. August 27, 2
2013-08-27
Managing multiple threads in a single pipeline
Grant 8,504,804 - Merten , et al. August 6, 2
2013-08-06
Providing thread fairness by biasing selection away from a stalling thread using a stall-cycle counter in a hyper-threaded microprocessor
Grant 8,438,369 - Marden , et al. May 7, 2
2013-05-07
Managing multiple threads in a single pipeline
Grant 8,402,253 - Merten , et al. March 19, 2
2013-03-19
Multiplication Instruction for Which Execution Completes Without Writing a Carry Flag
App 20110153994 - Gopal; Vinodh ;   et al.
2011-06-23
Operation frame filtering, building, and execution
Grant 7,913,064 - Jourdan , et al. March 22, 2
2011-03-22
Providing Thread Fairness In A Hyper-threaded Microprocessor
App 20110055524 - Marden; Morris ;   et al.
2011-03-03
Providing Thread Fairness In A Hyper-threaded Microprocessor
App 20110055525 - Marden; Morris ;   et al.
2011-03-03
Operation Frame Filtering, Building, And Execution
App 20090187712 - Jourdan; Stephan ;   et al.
2009-07-23
Operation frame filtering, building, and execution
Grant 7,533,247 - Jourdan , et al. May 12, 2
2009-05-12
Providing thread fairness in a hyper-threaded microprocessor
App 20080250233 - Marden; Morris ;   et al.
2008-10-09
Managing multiple threads in a single pipeline
App 20080082796 - Merten; Matthew ;   et al.
2008-04-03
In-use bits for efficient instruction fetch operations
App 20080065865 - Kim; Ilhyun ;   et al.
2008-03-13
Technique to perform three-source operations
App 20070300049 - Sodani; Avinash ;   et al.
2007-12-27
Operation frame filtering, building, and execution
App 20070157188 - Jourdan; Stephan ;   et al.
2007-07-05

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