Fan; Yuezhen

Patent Applications and Registrations

Patent applications and USPTO patent grants for Fan; Yuezhen.The latest application filed is for "method and circuits for localizing defective interconnect resources in programmable logic devices".

Company Profile

0.8.1

Fan; Yuezhen - Los Gatos CA
Fan; Yuezhen - San Jose CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Test structure and method for calibrating three-dimensional thermography fault isolation tool Grant 9,417,309 - Fan , et al. August 16, 2	2016-08-16
Increased usable programmable device dice Grant 9,372,956 - Fan , et al. June 21, 2	2016-06-21
Method and apparatus for compensating an integrated circuit layout for mechanical stress effects Grant 7,673,270 - Wang , et al. March 2, 2	2010-03-02
Method and apparatus for testing a memory device with a redundant self repair feature Grant 7,626,874 - Fan , et al. December 1, 2	2009-12-01
Circuit for and method of determining the location of a defect in an integrated circuit Grant 7,363,560 - Mark , et al. April 22, 2	2008-04-22
Test circuit for and method of identifying a defect in an integrated circuit Grant 7,227,364 - Fan , et al. June 5, 2	2007-06-05
Method and circuits for localizing defective interconnect resources in programmable logic devices Grant 7,145,344 - Mark , et al. December 5, 2	2006-12-05
Correlation of electrical test data with physical defect data Grant 6,950,771 - Fan , et al. September 27, 2	2005-09-27
Method and circuits for localizing defective interconnect resources in programmable logic devices App 20040103354 - Mark, David ; et al.	2004-05-27

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