Fan; Chen-Teng
Patent Applications and Registrations
Patent applications and USPTO patent grants for Fan; Chen-Teng.The latest application filed is for "sanity checker for integrated circuits".
- Fan; Chen-Teng - Beipu Township Hsinchu County TW
- Fan; Chen-Teng - Hsinchu TW
- Fan; Chen-Teng - Hsin-Chu Hsien TW
| Patent | Date |
|---|---|
| Sanity checker for integrated circuits Grant 7,467,365 - Chang , et al. December 16, 2 | 2008-12-16 |
| Sanity checker for integrated circuits App 20080072191 - Chang; George H. ; et al. | 2008-03-20 |
| I/O circuit placement method and semiconductor device Grant 7,165,232 - Chen , et al. January 16, 2 | 2007-01-16 |
| Memory test system for peak power reduction Grant 6,978,411 - Huang , et al. December 20, 2 | 2005-12-20 |
| I/O circuit placement method and semiconductor device App 20050127405 - Chen, Wang-Jin ; et al. | 2005-06-16 |
| Mux scan cell with delay circuit for reducing hold-time violations Grant 6,895,540 - Chen , et al. May 17, 2 | 2005-05-17 |
| Method of forecasting unit capacitance for chip design App 20040216062 - Fan, Chen-Teng | 2004-10-28 |
| Memory test system for peak power reduction App 20040068684 - Huang, Cheng-I ; et al. | 2004-04-08 |
| Mux scan cell with delay circuit for reducing hold-time violations App 20040015759 - Chen, Wang-Jin ; et al. | 2004-01-22 |
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