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Patent applications and USPTO patent grants for Fair, Harry Ray III.The latest application filed is for "timing verifier for mos devices and related method".
Patent | Date |
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Timing verifier for MOS devices and related method App 20030149951 - Nassif, Nevine ;   et al. | 2003-08-07 |
Method for mapping instructions using a set of valid and invalid logical to physical register assignments indicated by bits of a valid vector together with a logical register list App 20020156997 - Farrell, James Arthur ;   et al. | 2002-10-24 |
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