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Patent applications and USPTO patent grants for Faber; Robert.The latest application filed is for "techniques for entry to a lower power state for a memory device".
Patent | Date |
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Techniques for entry to a lower power state for a memory device Grant 9,916,104 - Jayachandran , et al. March 13, 2 | 2018-03-13 |
Techniques for entry to a lower power state for a memory device Grant 9,818,458 - Jayachandran , et al. November 14, 2 | 2017-11-14 |
Techniques For Entry To A Lower Power State For A Memory Device App 20170115916 - Jayachandran; Sowmiya ;   et al. | 2017-04-27 |
Generation of far memory access signals based on usage statistic tracking Grant 9,600,407 - Faber March 21, 2 | 2017-03-21 |
Method and system for managing a NAND flash memory by paging segments of a logical to physical address map to a non-volatile memory Grant 8,612,666 - Royer, Jr. , et al. December 17, 2 | 2013-12-17 |
Generation Of Far Memory Access Signals Based On Usage Statistic Tracking App 20130290597 - Faber; Robert | 2013-10-31 |
Method And System For Managing A Nand Flash Memory App 20100332730 - Royer, JR.; Robert J. ;   et al. | 2010-12-30 |
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