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Power island with independent power characteristics for memory and logic
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Power Island With Independent Power Characteristics For Memory And Logic
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Data Processor System And A Method For Communication Data
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Automatic Configuration Of A Communication Port As Transmitter Or Receiver Depending On The Sensed Transfer Direction Of A Connected Device
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Simulation Circuit of Pci Express Endpoint and Downstream Port for a Pci Express Switch
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High-speed interchip interface protocol
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Parallel data communication consuming low power
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Parallel data communication having skew intolerant data groups
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System and method for low overhead boundary checking of java arrays
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System and method for power management in a Java accelerator environment
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Data transfer between RGB and YCRCB color spaces for DCT interface
Grant 6,670,960 - Evoy December 30, 2 | 2003-12-30 |
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High-speed interchip interface protocol
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Parallel communication based on balanced data-bit encoding
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Method and apparatus for digital encoding and operator identification using stored user image
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Parallel data communication consuming low power
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Parallel data communication having skew intolerant data groups
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Flexible color modulation tables of ratios for generating color modulation patterns
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Intelligent power management interface for computer system hardware
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Method and system for accurate temporal determination of real-time events within a universal serial bus system
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Real time event determination in a universal serial bus system
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Microprocessor power control system
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System for implementing peripheral device bus mastering in a computer using a list processor for asserting and receiving control signals external to the DMA controller
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System using descriptor and having hardware state machine coupled to DMA for implementing peripheral device bus mastering via USB controller or IrDA controller
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System for implementing peripheral device bus mastering in desktop PC via hardware state machine for programming DMA controller, generating command signals and receiving completion status
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Multiplex address/data bus with multiplex system controller and method therefor
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System for reducing the power consumption of a computer system and method therefor
Grant 5,787,294 - Evoy July 28, 1 | 1998-07-28 |
System using DMA and descriptor for implementing peripheral device bus mastering via a universal serial bus controller or an infrared data association controller
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System and method for altering bus speed based on bus utilization
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Encoding assertion and de-assertion of interrupt requests and DMA requests in a serial bus I/O system
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Single shared ROM for storing keyboard microcontroller code portion and CPU code portion and disabling access to a portion while accessing to the other
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Central processing unit data entering and interrogating device and method therefor
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Serial bus I/O system and method for serializing interrupt requests and DMA requests in a computer system
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Method for configuring multiple identical serial I/O devices to unique addresses through a serial bus
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