Eustis; Steven M.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Eustis; Steven M..The latest application filed is for "structure and apparatus for a robust embedded interface".

Company Profile

0.10.9

Eustis; Steven M. - Essex Junction VT

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method and apparatus for a robust embedded interface Grant 8,239,715 - Eustis , et al. August 7, 2	2012-08-07
Design structure and apparatus for a robust embedded interface Grant 7,937,632 - Eustis , et al. May 3, 2	2011-05-03
Method And Apparatus For A Robust Embedded Interface App 20090319818 - Eustis; Steven M. ; et al.	2009-12-24
Structure And Apparatus For A Robust Embedded Interface App 20090319841 - Eustis; Steven M. ; et al.	2009-12-24
Compilable Memory Structure And Test Methodology For Both Asic And Foundry Test Environments App 20080256405 - Eustis; Steven M. ; et al.	2008-10-16
Compilable memory structure and test methodology for both ASIC and foundry test environments Grant 7,404,125 - Eustis , et al. July 22, 2	2008-07-22
Method and apparatus for test and repair of marginally functional SRAM cells Grant 7,210,085 - Brennan , et al. April 24, 2	2007-04-24
Compilable Memory Structure And Test Methodology For Both Asic And Foundry Test Environments App 20060176745 - Eustis; Steven M. ; et al.	2006-08-10
Variable column redundancy region boundaries in SRAM Grant 6,944,075 - Eustis , et al. September 13, 2	2005-09-13
Self-test architecture to implement data column redundancy in a RAM Grant 6,928,377 - Eustis , et al. August 9, 2	2005-08-09
Complementary two transistor ROM cell Grant 6,922,349 - Barry , et al. July 26, 2	2005-07-26
Method and apparatus for test and repair of marginally functional SRAM cells App 20050138496 - Brennan, Ciaran J. ; et al.	2005-06-23
Self-test architecture to implement data column redundancy in a RAM App 20050055173 - Eustis, Steven M. ; et al.	2005-03-10
Complementary two transistor ROM cell App 20050007809 - Barry, Robert L. ; et al.	2005-01-13
Complementary two transistor ROM cell Grant 6,778,419 - Barry , et al. August 17, 2	2004-08-17
Substituting high performance and low power macros in integrated circuit chips Grant 6,721,927 - Croce , et al. April 13, 2	2004-04-13
Substituting high performance and low power macros in integrated circuit chips App 20030188266 - Croce, Peter F. ; et al.	2003-10-02
Complementary two transistor ROM cell App 20030185035 - Barry, Robert L. ; et al.	2003-10-02
Compilable writeable read only memory (ROM) built with register arrays Grant 6,600,673 - Croce , et al. July 29, 2	2003-07-29

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